Support RV32E/RV64E base ISAs

1 files changed, 12 insertions, 9 deletions

diff --git a/riscv/processor.h b/riscv/processor.h
index de896bf..35f8afc 100644
--- a/riscv/processor.h
+++ b/riscv/processor.h
@@ -29,14 +29,22 @@ struct insn_desc_t
 {
   insn_bits_t match;
   insn_bits_t mask;
-  insn_func_t rv32;
-  insn_func_t rv64;
+  insn_func_t rv32i;
+  insn_func_t rv64i;
+  insn_func_t rv32e;
+  insn_func_t rv64e;
 
-  insn_func_t func(int xlen) { return xlen == 64 ? rv64 : rv32; }
+  insn_func_t func(int xlen, bool rve)
+  {
+    if (rve)
+      return xlen == 64 ? rv64e : rv32e;
+    else
+      return xlen == 64 ? rv64i : rv32i;
+  }
 
   static insn_desc_t illegal()
   {
-    return {0, 0, &illegal_instruction, &illegal_instruction};
+    return {0, 0, &illegal_instruction, &illegal_instruction, &illegal_instruction, &illegal_instruction};
   }
 };
 
@@ -603,9 +611,4 @@ public:
   vectorUnit_t VU;
 };
 
-#define REGISTER_INSN(proc, name, match, mask, archen) \
-  extern reg_t rv32_##name(processor_t*, insn_t, reg_t); \
-  extern reg_t rv64_##name(processor_t*, insn_t, reg_t); \
-  proc->register_insn((insn_desc_t){match, mask, rv32_##name, rv64_##name,archen});
-
 #endif