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authorAndrew Waterman <andrew@sifive.com>2022-04-07 09:51:39 -0700
committerAndrew Waterman <andrew@sifive.com>2022-04-07 09:51:39 -0700
commitdba7efaf9e2e8d5251820c8555a184f715bb4d46 (patch)
tree9076c2b2607f2cfce0c434259692be08f1a72f2f /riscv/processor.h
parente52327deeefb29908a822a9eb2f6fc5c87e968af (diff)
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Rename processor_t::set_csr to put_csr to fix build on RISC-V
The alternative would be to #undef set_csr after including encoding.h, but this solution strikes me as cleaner. Part of the reason is that set_csr was not a great name: it sounds like it implements the CSRRS (read & set) instruction, rather than impelementing a simple write.
Diffstat (limited to 'riscv/processor.h')
-rw-r--r--riscv/processor.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/processor.h b/riscv/processor.h
index 7d05346..617fa42 100644
--- a/riscv/processor.h
+++ b/riscv/processor.h
@@ -279,7 +279,7 @@ public:
#endif
void reset();
void step(size_t n); // run for n cycles
- void set_csr(int which, reg_t val);
+ void put_csr(int which, reg_t val);
uint32_t get_id() const { return id; }
reg_t get_csr(int which, insn_t insn, bool write, bool peek = 0);
reg_t get_csr(int which) { return get_csr(which, insn_t(0), false, true); }