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author | Rupert Swarbrick <rswarbrick@gmail.com> | 2022-02-18 15:45:21 +0000 |
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committer | Rupert Swarbrick <rswarbrick@gmail.com> | 2022-03-12 21:51:01 +0000 |
commit | cb632586bdb1b57ea4e5a5543e21bbb257e47f3b (patch) | |
tree | 17720758321ebccff687f9d642ac5d14c49df95b /riscv/processor.h | |
parent | 59ec157568d2a52feeec568ac042362db1c5ddbc (diff) | |
download | spike-cb632586bdb1b57ea4e5a5543e21bbb257e47f3b.zip spike-cb632586bdb1b57ea4e5a5543e21bbb257e47f3b.tar.gz spike-cb632586bdb1b57ea4e5a5543e21bbb257e47f3b.tar.bz2 |
Construct an isa_parser_t and pass it to processor_t constructor
This is a minor change, turning processor_t from a child class of
isa_parser_t into a class that contains an isa_parser_t as a field.
The point is that it is a step toward separating out
"configuration" (and ISA string parsing) from processor state. This
should be helpful for rejigging things so that we construct more from
a supplied device tree.
Diffstat (limited to 'riscv/processor.h')
-rw-r--r-- | riscv/processor.h | 17 |
1 files changed, 12 insertions, 5 deletions
diff --git a/riscv/processor.h b/riscv/processor.h index 2fe5ede..3e9a743 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -322,23 +322,28 @@ public: else return extension_table[ext]; } + const std::unordered_map<std::string, extension_t*> & + get_extensions() const { return extensions; } + protected: unsigned max_xlen; reg_t max_isa; std::vector<bool> extension_table; std::string isa_string; - std::unordered_map<std::string, extension_t*> isa_extensions; + std::unordered_map<std::string, extension_t*> extensions; }; // this class represents one processor in a RISC-V machine. -class processor_t : public abstract_device_t, public isa_parser_t +class processor_t : public abstract_device_t { public: - processor_t(const char* isa, const char* priv, const char* varch, + processor_t(isa_parser_t isa, const char* varch, simif_t* sim, uint32_t id, bool halt_on_reset, FILE *log_file, std::ostream& sout_); // because of command line option --log and -s we need both ~processor_t(); + const isa_parser_t &get_isa() { return isa; } + void set_debug(bool value); void set_histogram(bool value); #ifdef RISCV_ENABLE_COMMITLOG @@ -374,7 +379,7 @@ public: if (ext >= 'A' && ext <= 'Z') return state.misa->extension_enabled(ext); else - return extension_table[ext]; + return isa.extension_enabled(ext); } // Is this extension enabled? and abort if this extension can // possibly be disabled dynamically. Useful for documenting @@ -383,7 +388,7 @@ public: if (ext >= 'A' && ext <= 'Z') return state.misa->extension_enabled_const(ext); else - return extension_table[ext]; // assume this can't change + return isa.extension_enabled(ext); // assume this can't change } void set_impl(uint8_t impl, bool val) { impl_table[impl] = val; } bool supports_impl(uint8_t impl) const { @@ -512,6 +517,8 @@ public: const char* get_symbol(uint64_t addr); private: + isa_parser_t isa; + simif_t* sim; mmu_t* mmu; // main memory is always accessed via the mmu std::unordered_map<std::string, extension_t*> custom_extensions; |