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| author | Andrew Waterman <andrew@sifive.com> | 2022-01-06 17:13:38 -0800 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2022-01-06 17:20:02 -0800 |
| commit | 94381783d67b8f3faa033058f0361e6a95ce0ecc (patch) | |
| tree | edaa8dcd27e05b4ee560cfc242e9f2ddfd1aa05f /riscv/processor.h | |
| parent | 5b7cdbe1cf75112bd2a472b7490b15fa7078d798 (diff) | |
| download | spike-94381783d67b8f3faa033058f0361e6a95ce0ecc.zip spike-94381783d67b8f3faa033058f0361e6a95ce0ecc.tar.gz spike-94381783d67b8f3faa033058f0361e6a95ce0ecc.tar.bz2 | |
DRY in illegal-instruction descriptors
Diffstat (limited to 'riscv/processor.h')
| -rw-r--r-- | riscv/processor.h | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/riscv/processor.h b/riscv/processor.h index 2d14bb3..de896bf 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -23,6 +23,8 @@ class trap_t; class extension_t; class disassembler_t; +reg_t illegal_instruction(processor_t* p, insn_t insn, reg_t pc); + struct insn_desc_t { insn_bits_t match; @@ -31,6 +33,11 @@ struct insn_desc_t insn_func_t rv64; insn_func_t func(int xlen) { return xlen == 64 ? rv64 : rv32; } + + static insn_desc_t illegal() + { + return {0, 0, &illegal_instruction, &illegal_instruction}; + } }; // regnum, data @@ -596,8 +603,6 @@ public: vectorUnit_t VU; }; -reg_t illegal_instruction(processor_t* p, insn_t insn, reg_t pc); - #define REGISTER_INSN(proc, name, match, mask, archen) \ extern reg_t rv32_##name(processor_t*, insn_t, reg_t); \ extern reg_t rv64_##name(processor_t*, insn_t, reg_t); \ |