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author | Scott Johnson <scott.johnson@arilinc.com> | 2022-07-13 10:45:41 -0700 |
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committer | Scott Johnson <scott.johnson@arilinc.com> | 2022-07-13 18:57:56 -0700 |
commit | 3688fd8302d1b7b8eea1dd8f6206ceab1bedfb2c (patch) | |
tree | 1a481ce817e2e5e2ecd4c9badb5cf2e1385bff00 /riscv/processor.h | |
parent | b21a28bce174f2d1ac3e8a424bc9b9b1f01251a6 (diff) | |
download | spike-3688fd8302d1b7b8eea1dd8f6206ceab1bedfb2c.zip spike-3688fd8302d1b7b8eea1dd8f6206ceab1bedfb2c.tar.gz spike-3688fd8302d1b7b8eea1dd8f6206ceab1bedfb2c.tar.bz2 |
Properly log mstatush side effect updates
These have never been logged properly.
Diffstat (limited to 'riscv/processor.h')
-rw-r--r-- | riscv/processor.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/riscv/processor.h b/riscv/processor.h index 727c404..347ae16 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -133,6 +133,7 @@ struct state_t bool v; misa_csr_t_p misa; mstatus_csr_t_p mstatus; + csr_t_p mstatush; csr_t_p mepc; csr_t_p mtval; csr_t_p mtvec; |