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author | Rupert Swarbrick <rswarbrick@gmail.com> | 2022-02-18 17:04:34 +0000 |
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committer | Rupert Swarbrick <rswarbrick@gmail.com> | 2022-02-18 17:08:04 +0000 |
commit | 24953e7c0072e372fc8f7315715f2ba435209e30 (patch) | |
tree | 4d475b7100a33521936f52c759a9a8539bef834e /riscv/processor.h | |
parent | 5892e9356e53129afa6cdcaf3fc5aad5490a7f83 (diff) | |
download | spike-24953e7c0072e372fc8f7315715f2ba435209e30.zip spike-24953e7c0072e372fc8f7315715f2ba435209e30.tar.gz spike-24953e7c0072e372fc8f7315715f2ba435209e30.tar.bz2 |
Rename minstret CSR classes to something more general
No other functional change. This is preparation for a follow-up
commit, which will split MINSTRET and MCYCLE (to allow cosimulation
environments where the two values might not be equal)
Diffstat (limited to 'riscv/processor.h')
-rw-r--r-- | riscv/processor.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/processor.h b/riscv/processor.h index b860e62..986431d 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -176,7 +176,7 @@ struct state_t csr_t_p mtval; csr_t_p mtvec; csr_t_p mcause; - minstret_csr_t_p minstret; + wide_counter_csr_t_p minstret; mie_csr_t_p mie; mip_csr_t_p mip; csr_t_p medeleg; |