diff options
author | Chih-Min Chao <chihmin.chao@sifive.com> | 2019-12-23 00:32:48 -0800 |
---|---|---|
committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-02-12 23:08:01 -0800 |
commit | 2cac7dfe9f05071d062b5287a1261f9c71b7b2a5 (patch) | |
tree | 99e9b969b0c59a789194942bb0ed34da7fdd4e42 /riscv/processor.cc | |
parent | 383f7645c78589223d19e6a3d9bff21b352c7837 (diff) | |
download | spike-2cac7dfe9f05071d062b5287a1261f9c71b7b2a5.zip spike-2cac7dfe9f05071d062b5287a1261f9c71b7b2a5.tar.gz spike-2cac7dfe9f05071d062b5287a1261f9c71b7b2a5.tar.bz2 |
state: rewrite state_t initialization
implement a specific initalization function to avoid
weird segfault when the member is complex
structure such as map or hash.
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/processor.cc')
-rw-r--r-- | riscv/processor.cc | 56 |
1 files changed, 51 insertions, 5 deletions
diff --git a/riscv/processor.cc b/riscv/processor.cc index df13bca..be99e80 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -215,16 +215,62 @@ void processor_t::parse_isa_string(const char* str) void state_t::reset(reg_t max_isa) { - memset(this, 0, sizeof(*this)); - misa = max_isa; - prv = PRV_M; pc = DEFAULT_RSTVEC; + XPR.reset(); + FPR.reset(); + + prv = PRV_M; + misa = max_isa; + mstatus = 0; + mepc = 0; + mtval = 0; + mscratch = 0; + mtvec = 0; + mcause = 0; + minstret = 0; + mie = 0; + mip = 0; + medeleg = 0; + mideleg = 0; + mcounteren = 0; + scounteren = 0; + sepc = 0; + stval = 0; + sscratch = 0; + stvec = 0; + satp = 0; + scause = 0; + + dpc = 0; + dscratch0 = 0; + dscratch1 = 0; + memset(&this->dcsr, 0, sizeof(this->dcsr)); + tselect = 0; - for (unsigned int i = 0; i < num_triggers; i++) - mcontrol[i].type = 2; + for (auto &item : mcontrol) + item.type = 2; + + memset(this->tdata2, 0, sizeof(this->tdata2)); + debug_mode = false; + memset(this->pmpcfg, 0, sizeof(this->pmpcfg)); pmpcfg[0] = PMP_R | PMP_W | PMP_X | PMP_NAPOT; + + memset(this->pmpaddr, 0, sizeof(this->pmpaddr)); pmpaddr[0] = ~reg_t(0); + + fflags = 0; + frm = 0; + serialized = false; + +#ifdef RISCV_ENABLE_COMMITLOG + log_reg_write.addr = 0; + log_mem_read.size = 0; + log_mem_write.size = 0; + last_inst_priv = 0; + last_inst_xlen = 0; + last_inst_flen = 0; +#endif } void vectorUnit_t::reset(){ |