aboutsummaryrefslogtreecommitdiff
path: root/riscv/mmu.h
diff options
context:
space:
mode:
authorAndrew Waterman <aswaterman@gmail.com>2015-01-02 17:29:05 -0800
committerAndrew Waterman <aswaterman@gmail.com>2015-01-02 17:29:05 -0800
commitec297672b0c9d58d1ee6c2ac976ccf28863bd3c2 (patch)
tree3ddc58262ddca8b2f610cff9e53bf4390a989d8c /riscv/mmu.h
parent3fd738af16ef977f1aa507e2525bb4c16fff9026 (diff)
downloadspike-ec297672b0c9d58d1ee6c2ac976ccf28863bd3c2.zip
spike-ec297672b0c9d58d1ee6c2ac976ccf28863bd3c2.tar.gz
spike-ec297672b0c9d58d1ee6c2ac976ccf28863bd3c2.tar.bz2
On misaligned fetch, set EPC to target, not branch itself
Diffstat (limited to 'riscv/mmu.h')
-rw-r--r--riscv/mmu.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/riscv/mmu.h b/riscv/mmu.h
index 08d41be..d24ed18 100644
--- a/riscv/mmu.h
+++ b/riscv/mmu.h
@@ -167,7 +167,9 @@ private:
void* data = tlb_data[idx] + addr;
if (unlikely(addr & (bytes-1)))
- store ? throw trap_store_address_misaligned(addr) : throw trap_load_address_misaligned(addr);
+ store ? throw trap_store_address_misaligned(addr) :
+ fetch ? throw trap_instruction_address_misaligned(addr) :
+ throw trap_load_address_misaligned(addr);
if (likely(tag == expected_tag))
return data;