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| author | Andrew Waterman <waterman@eecs.berkeley.edu> | 2014-02-13 18:46:42 -0800 |
|---|---|---|
| committer | Andrew Waterman <waterman@eecs.berkeley.edu> | 2014-02-13 18:46:42 -0800 |
| commit | 6c99f30d7848ab3b5f59a07ae5027cc4ec0c1322 (patch) | |
| tree | 990b2db9c499bd7cbc6425a9a6347400b98e9fee /riscv/mmu.h | |
| parent | b227ec194fdea025724ec541c0b472708e439bbe (diff) | |
| download | spike-6c99f30d7848ab3b5f59a07ae5027cc4ec0c1322.zip spike-6c99f30d7848ab3b5f59a07ae5027cc4ec0c1322.tar.gz spike-6c99f30d7848ab3b5f59a07ae5027cc4ec0c1322.tar.bz2 | |
Fix I$ simulator not making forward progress
Diffstat (limited to 'riscv/mmu.h')
| -rw-r--r-- | riscv/mmu.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/riscv/mmu.h b/riscv/mmu.h index c09cfc4..c3d8f41 100644 --- a/riscv/mmu.h +++ b/riscv/mmu.h @@ -78,11 +78,11 @@ public: store_func(uint64) // load instruction from memory at aligned address. - inline icache_entry_t access_icache(reg_t addr) + inline icache_entry_t* access_icache(reg_t addr) { reg_t idx = (addr / sizeof(insn_t)) % ICACHE_SIZE; - icache_entry_t entry = icache[idx]; - if (likely(entry.tag == addr)) + icache_entry_t* entry = &icache[idx]; + if (likely(entry->tag == addr)) return entry; void* iaddr = translate(addr, sizeof(insn_t), false, true); @@ -99,12 +99,12 @@ public: icache[idx].tag = -1; tracer.trace(paddr, sizeof(insn_t), false, true); } - return icache[idx]; + return &icache[idx]; } inline insn_fetch_t load_insn(reg_t addr) { - return access_icache(addr).data; + return access_icache(addr)->data; } void set_processor(processor_t* p) { proc = p; flush_tlb(); } |