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| author | Tim Newsome <tim@sifive.com> | 2016-09-02 12:37:38 -0700 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2016-09-02 12:37:38 -0700 |
| commit | 2b390a9dea7435c5e83c11433c05e136ad9b163a (patch) | |
| tree | 1e61e6024ebce5290b99401c4d7d94f8d8b3a091 /riscv/mmu.h | |
| parent | e464ab8efb36fc089303f11ddf78e32a90530c43 (diff) | |
| download | spike-2b390a9dea7435c5e83c11433c05e136ad9b163a.zip spike-2b390a9dea7435c5e83c11433c05e136ad9b163a.tar.gz spike-2b390a9dea7435c5e83c11433c05e136ad9b163a.tar.bz2 | |
Support triggers on TLB misses.
Diffstat (limited to 'riscv/mmu.h')
| -rw-r--r-- | riscv/mmu.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/riscv/mmu.h b/riscv/mmu.h index 3da2c92..1f8d34b 100644 --- a/riscv/mmu.h +++ b/riscv/mmu.h @@ -219,6 +219,9 @@ private: inline trigger_matched_t *trigger_exception(trigger_operation_t operation, reg_t address, reg_t data) { + if (!proc) { + return NULL; + } int match = proc->trigger_match(operation, address, data); if (match == -1) return NULL; |