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author | Tim Newsome <tim@sifive.com> | 2022-03-15 10:41:21 -0700 |
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committer | Tim Newsome <tim@sifive.com> | 2022-03-30 10:41:44 -0700 |
commit | 16ed520e8d35a0eaa56b708aa540400312acdc09 (patch) | |
tree | 967ea7845312a56a265e37c141d5ad5f2dc0b028 /riscv/mmu.h | |
parent | beaf1601e065f1399c9e2b12c48bbb713a8c40c3 (diff) | |
download | spike-16ed520e8d35a0eaa56b708aa540400312acdc09.zip spike-16ed520e8d35a0eaa56b708aa540400312acdc09.tar.gz spike-16ed520e8d35a0eaa56b708aa540400312acdc09.tar.bz2 |
Replace state.mcontrol with TM.triggers.
Created a new triggers::module_t to hold the structure.
Also make sure mcontrol_t instances are properly initialized.
Diffstat (limited to 'riscv/mmu.h')
-rw-r--r-- | riscv/mmu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/mmu.h b/riscv/mmu.h index a314888..61fe105 100644 --- a/riscv/mmu.h +++ b/riscv/mmu.h @@ -491,7 +491,7 @@ private: int match = proc->trigger_match(operation, address, data); if (match == -1) return NULL; - if (proc->state.mcontrol[match].timing == 0) { + if (proc->TM.triggers[match]->timing == 0) { throw trigger_matched_t(match, operation, address, data); } return new trigger_matched_t(match, operation, address, data); |