diff options
author | Anup Patel <anup.patel@wdc.com> | 2020-12-18 09:49:29 +0530 |
---|---|---|
committer | Anup Patel <anup@brainfault.org> | 2020-12-18 10:08:03 +0530 |
commit | 11389c9d5ada7c983aa0efb15141d5e3286c5ae1 (patch) | |
tree | 834f667e4305e290be0601ef11183c11e9ec34a5 /riscv/mmu.h | |
parent | 236de4dbfae9a23a1b58627faca7e01c95e6cee7 (diff) | |
download | spike-11389c9d5ada7c983aa0efb15141d5e3286c5ae1.zip spike-11389c9d5ada7c983aa0efb15141d5e3286c5ae1.tar.gz spike-11389c9d5ada7c983aa0efb15141d5e3286c5ae1.tar.bz2 |
Check and use proc variable in MMU emulation
We cannot blindly use proc variable in MMU emulation because external
debug emulation instantiates MMU with proc=NULL.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Diffstat (limited to 'riscv/mmu.h')
-rw-r--r-- | riscv/mmu.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/riscv/mmu.h b/riscv/mmu.h index ada20fb..f7b4a04 100644 --- a/riscv/mmu.h +++ b/riscv/mmu.h @@ -253,7 +253,7 @@ public: if (auto host_addr = sim->addr_to_mem(paddr)) load_reservation_address = refill_tlb(vaddr, paddr, host_addr, LOAD).target_offset + vaddr; else - throw trap_load_access_fault(proc->state.v, vaddr, 0, 0); // disallow LR to I/O space + throw trap_load_access_fault((proc) ? proc->state.v : false, vaddr, 0, 0); // disallow LR to I/O space } inline bool check_load_reservation(reg_t vaddr, size_t size) @@ -265,7 +265,7 @@ public: if (auto host_addr = sim->addr_to_mem(paddr)) return load_reservation_address == refill_tlb(vaddr, paddr, host_addr, STORE).target_offset + vaddr; else - throw trap_store_access_fault(proc->state.v, vaddr, 0, 0); // disallow SC to I/O space + throw trap_store_access_fault((proc) ? proc->state.v : false, vaddr, 0, 0); // disallow SC to I/O space } static const reg_t ICACHE_ENTRIES = 1024; |