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| author | Andrew Waterman <andrew@sifive.com> | 2022-10-13 13:57:08 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2022-10-14 12:12:58 -0700 |
| commit | 062ef8868033605b56269b185e3584ef2370ac12 (patch) | |
| tree | 942575038f76bc9bc39da3dd502504607cf27b84 /riscv/mmu.h | |
| parent | 37c8985013b1a15a8043f002e94f38e09cb55ef4 (diff) | |
| download | spike-062ef8868033605b56269b185e3584ef2370ac12.zip spike-062ef8868033605b56269b185e3584ef2370ac12.tar.gz spike-062ef8868033605b56269b185e3584ef2370ac12.tar.bz2 | |
In triggers, use optional<data> instead of {has_data, data}
Diffstat (limited to 'riscv/mmu.h')
| -rw-r--r-- | riscv/mmu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/mmu.h b/riscv/mmu.h index 01e74ef..da84adc 100644 --- a/riscv/mmu.h +++ b/riscv/mmu.h @@ -387,7 +387,7 @@ private: bool mmio_load(reg_t addr, size_t len, uint8_t* bytes); bool mmio_store(reg_t addr, size_t len, const uint8_t* bytes); bool mmio_ok(reg_t addr, access_type type); - void check_triggers(triggers::operation_t operation, reg_t address, bool has_data, reg_t data = 0); + void check_triggers(triggers::operation_t operation, reg_t address, std::optional<reg_t> data = std::nullopt); reg_t translate(reg_t addr, reg_t len, access_type type, uint32_t xlate_flags); // ITLB lookup |