Refactor and fix LR/SC implementation (#217)

- Use physical addresses to avoid homonym ambiguity (closes #215)

- Yield reservation on store-conditional (https://github.com/riscv/riscv-isa-manual/commit/03a5e722fc0fe7b94dd0a49f550ff7b41a63f612)

- Don't yield reservation on exceptions (it's no longer required).

1 files changed, 1 insertions, 0 deletions

diff --git a/riscv/mmu.cc b/riscv/mmu.cc
index 3a0bd39..021f587 100644
--- a/riscv/mmu.cc
+++ b/riscv/mmu.cc
@@ -12,6 +12,7 @@ mmu_t::mmu_t(simif_t* sim, processor_t* proc)
   matched_trigger(NULL)
 {
   flush_tlb();
+  yield_load_reservation();
 }
 
 mmu_t::~mmu_t()