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| author | Scott Johnson <scott.johnson@arilinc.com> | 2021-09-02 14:29:37 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-09-02 14:29:37 -0700 |
| commit | 20efc8288159e437928c249fcea41e77d2b254e4 (patch) | |
| tree | b13d61c57ca3b2a66bca6ea1d2dea41e23217d51 /riscv/mmu.cc | |
| parent | f3ed5945ba021857bf5e46b3000ee3e2c5e0eede (diff) | |
| download | spike-20efc8288159e437928c249fcea41e77d2b254e4.zip spike-20efc8288159e437928c249fcea41e77d2b254e4.tar.gz spike-20efc8288159e437928c249fcea41e77d2b254e4.tar.bz2 | |
Use correct CSR for SUM/MXR for VS-mode load/stores (#792)
See discussion at
https://github.com/riscv/riscv-isa-sim/commit/9cfc3e7fef7b29f6b53879d7c91c35459d9b493d#r55593451
Diffstat (limited to 'riscv/mmu.cc')
| -rw-r--r-- | riscv/mmu.cc | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/riscv/mmu.cc b/riscv/mmu.cc index e57e81c..d9fdd07 100644 --- a/riscv/mmu.cc +++ b/riscv/mmu.cc @@ -311,7 +311,8 @@ reg_t mmu_t::s2xlate(reg_t gva, reg_t gpa, access_type type, access_type trap_ty if (vm.levels == 0) return gpa; - bool mxr = proc->state.mstatus & MSTATUS_MXR; + reg_t arch_mstatus = proc->state.v ? proc->state.vsstatus : proc->state.mstatus; + bool mxr = arch_mstatus & MSTATUS_MXR; reg_t base = vm.ptbase; for (int i = vm.levels - 1; i >= 0; i--) { @@ -390,8 +391,10 @@ reg_t mmu_t::walk(reg_t addr, access_type type, reg_t mode, bool virt, bool hlvx return s2xlate(addr, addr & ((reg_t(2) << (proc->xlen-1))-1), type, type, virt, hlvx) & ~page_mask; // zero-extend from xlen bool s_mode = mode == PRV_S; - bool sum = (virt ? proc->state.vsstatus : proc->state.mstatus) & MSTATUS_SUM; - bool mxr = (proc->state.mstatus | (virt ? proc->state.vsstatus : 0)) & MSTATUS_MXR; + reg_t arch_vsstatus = proc->state.v ? proc->state.mstatus : proc->state.vsstatus; + reg_t arch_mstatus = proc->state.v ? proc->state.vsstatus : proc->state.mstatus; + bool sum = (virt ? arch_vsstatus : arch_mstatus) & MSTATUS_SUM; + bool mxr = (arch_mstatus | (virt ? arch_vsstatus : 0)) & MSTATUS_MXR; // verify bits xlen-1:va_bits-1 are all equal int va_bits = PGSHIFT + vm.levels * vm.idxbits; |