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| author | Scott Johnson <scott.johnson@arilinc.com> | 2021-02-24 10:42:24 -0800 |
|---|---|---|
| committer | Andrew Waterman <aswaterman@gmail.com> | 2021-09-08 07:59:02 -0700 |
| commit | 1ac1e12f7d3c534fe8a53f26685d510d345594e1 (patch) | |
| tree | b4b414bd17deecf647989389c8fb8f60123e0482 /riscv/mmu.cc | |
| parent | 8a07837cda94a7f4fde2b5a791dfc7e3c6545f57 (diff) | |
| download | spike-1ac1e12f7d3c534fe8a53f26685d510d345594e1.zip spike-1ac1e12f7d3c534fe8a53f26685d510d345594e1.tar.gz spike-1ac1e12f7d3c534fe8a53f26685d510d345594e1.tar.bz2 | |
Remove unnecessary check of proc
We've already checked just a few lines up that proc is defined.
Diffstat (limited to 'riscv/mmu.cc')
| -rw-r--r-- | riscv/mmu.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/mmu.cc b/riscv/mmu.cc index d7a4110..efc3538 100644 --- a/riscv/mmu.cc +++ b/riscv/mmu.cc @@ -53,7 +53,7 @@ reg_t mmu_t::translate(reg_t addr, reg_t len, access_type type, uint32_t xlate_f if (!proc) return addr; - bool virt = (proc) ? proc->state.v : false; + bool virt = proc->state.v; bool hlvx = xlate_flags & RISCV_XLATE_VIRT_HLVX; reg_t mode = proc->state.prv; if (type != FETCH) { |