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| author | Tim Newsome <tim@sifive.com> | 2016-05-04 09:40:20 -0700 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2016-05-23 12:12:12 -0700 |
| commit | ee96c255f12477b1762426ceb7bbd83370c899cd (patch) | |
| tree | 8c938c1abcbeb16fcf4658bd637f03ea34cd10d7 /riscv/mmu.cc | |
| parent | f9e7a3f1e1058b8d54d15d9ebcecd7e978d5deb9 (diff) | |
| download | spike-ee96c255f12477b1762426ceb7bbd83370c899cd.zip spike-ee96c255f12477b1762426ceb7bbd83370c899cd.tar.gz spike-ee96c255f12477b1762426ceb7bbd83370c899cd.tar.bz2 | |
Fix off-by-two in general read registers.
Now the exit test passes!
Diffstat (limited to 'riscv/mmu.cc')
| -rw-r--r-- | riscv/mmu.cc | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/riscv/mmu.cc b/riscv/mmu.cc index 44ff97a..9b623ae 100644 --- a/riscv/mmu.cc +++ b/riscv/mmu.cc @@ -74,7 +74,6 @@ const uint16_t* mmu_t::fetch_slow_path(reg_t vaddr) void mmu_t::load_slow_path(reg_t addr, reg_t len, uint8_t* bytes) { reg_t paddr = translate(addr, LOAD); - fprintf(stderr, "load_slow_path 0x%lx -> 0x%lx\n", addr, paddr); if (sim->addr_is_mem(paddr)) { memcpy(bytes, sim->addr_to_mem(paddr), len); if (tracer.interested_in_range(paddr, paddr + PGSIZE, LOAD)) @@ -89,7 +88,6 @@ void mmu_t::load_slow_path(reg_t addr, reg_t len, uint8_t* bytes) void mmu_t::store_slow_path(reg_t addr, reg_t len, const uint8_t* bytes) { reg_t paddr = translate(addr, STORE); - fprintf(stderr, "store_slow_path 0x%lx -> 0x%lx\n", addr, paddr); if (sim->addr_is_mem(paddr)) { memcpy(sim->addr_to_mem(paddr), bytes, len); if (tracer.interested_in_range(paddr, paddr + PGSIZE, STORE)) @@ -147,7 +145,6 @@ reg_t mmu_t::walk(reg_t addr, access_type type, bool supervisor, bool pum) void* ppte = sim->addr_to_mem(pte_addr); reg_t pte = ptesize == 4 ? *(uint32_t*)ppte : *(uint64_t*)ppte; - fprintf(stderr, "walk pte entry 0x%lx = 0x%lx\n", pte_addr, pte); reg_t ppn = pte >> PTE_PPN_SHIFT; if (PTE_TABLE(pte)) { // next level of page table @@ -162,7 +159,6 @@ reg_t mmu_t::walk(reg_t addr, access_type type, bool supervisor, bool pum) // for superpage mappings, make a fake leaf PTE for the TLB's benefit. reg_t vpn = addr >> PGSHIFT; reg_t value = (ppn | (vpn & ((reg_t(1) << ptshift) - 1))) << PGSHIFT; - fprintf(stderr, "walk 0x%lx -> 0x%lx\n", addr, value); return value; } } |