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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-06-16 21:07:54 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-06-16 21:41:15 -0700 |
| commit | 939128f1e0a10c6c770bf15394d3c8b0606eb059 (patch) | |
| tree | 2827b83170f2a573ab42c3ce9b05ba9950172af5 /riscv/interactive.cc | |
| parent | 2495301866ef4c432dab63bc140092994771adde (diff) | |
| download | spike-939128f1e0a10c6c770bf15394d3c8b0606eb059.zip spike-939128f1e0a10c6c770bf15394d3c8b0606eb059.tar.gz spike-939128f1e0a10c6c770bf15394d3c8b0606eb059.tar.bz2 | |
zfh: support register dump in interactive mode
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/interactive.cc')
| -rw-r--r-- | riscv/interactive.cc | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/riscv/interactive.cc b/riscv/interactive.cc index 405bf35..00e505d 100644 --- a/riscv/interactive.cc +++ b/riscv/interactive.cc @@ -69,6 +69,7 @@ void sim_t::interactive() funcs["vreg"] = &sim_t::interactive_vreg; funcs["reg"] = &sim_t::interactive_reg; funcs["freg"] = &sim_t::interactive_freg; + funcs["fregh"] = &sim_t::interactive_fregh; funcs["fregs"] = &sim_t::interactive_fregs; funcs["fregd"] = &sim_t::interactive_fregd; funcs["pc"] = &sim_t::interactive_pc; @@ -118,6 +119,7 @@ void sim_t::interactive_help(const std::string& cmd, const std::vector<std::stri std::cerr << "Interactive commands:\n" "reg <core> [reg] # Display [reg] (all if omitted) in <core>\n" + "fregh <core> <reg> # Display half precision <reg> in <core>\n" "fregs <core> <reg> # Display single precision <reg> in <core>\n" "fregd <core> <reg> # Display double precision <reg> in <core>\n" "vreg <core> [reg] # Display vector [reg] (all if omitted) in <core>\n" @@ -296,6 +298,13 @@ void sim_t::interactive_freg(const std::string& cmd, const std::vector<std::stri fprintf(stderr, "0x%016" PRIx64 "%016" PRIx64 "\n", r.v[1], r.v[0]); } +void sim_t::interactive_fregh(const std::string& cmd, const std::vector<std::string>& args) +{ + fpr f; + f.r = freg(f16_to_f32(f16(get_freg(args)))); + fprintf(stderr, "%g\n", isBoxedF32(f.r) ? (double)f.s : NAN); +} + void sim_t::interactive_fregs(const std::string& cmd, const std::vector<std::string>& args) { fpr f; |