Update to new privileged spec

Sorry, everyone.

57 files changed, 74 insertions, 63 deletions

diff --git a/riscv/insns/addiw.h b/riscv/insns/addiw.h
index 71ab292..4263ead 100644
--- a/riscv/insns/addiw.h
+++ b/riscv/insns/addiw.h
@@ -1,2 +1,2 @@
-require_xpr64;
+require_rv64;
 WRITE_RD(sext32(insn.i_imm() + RS1));
diff --git a/riscv/insns/addw.h b/riscv/insns/addw.h
index f2d98d9..706dc9c 100644
--- a/riscv/insns/addw.h
+++ b/riscv/insns/addw.h
@@ -1,2 +1,2 @@
-require_xpr64;
+require_rv64;
 WRITE_RD(sext32(RS1 + RS2));
diff --git a/riscv/insns/amoadd_d.h b/riscv/insns/amoadd_d.h
index 532902e..c6bacaf 100644
--- a/riscv/insns/amoadd_d.h
+++ b/riscv/insns/amoadd_d.h
@@ -1,4 +1,4 @@
-require_xpr64;
+require_rv64;
 reg_t v = MMU.load_uint64(RS1);
 MMU.store_uint64(RS1, RS2 + v);
 WRITE_RD(v);
diff --git a/riscv/insns/amoand_d.h b/riscv/insns/amoand_d.h
index 8a672ba..d896ec1 100644
--- a/riscv/insns/amoand_d.h
+++ b/riscv/insns/amoand_d.h
@@ -1,4 +1,4 @@
-require_xpr64;
+require_rv64;
 reg_t v = MMU.load_uint64(RS1);
 MMU.store_uint64(RS1, RS2 & v);
 WRITE_RD(v);
diff --git a/riscv/insns/amomax_d.h b/riscv/insns/amomax_d.h
index 7b97e7b..0a66214 100644
--- a/riscv/insns/amomax_d.h
+++ b/riscv/insns/amomax_d.h
@@ -1,4 +1,4 @@
-require_xpr64;
+require_rv64;
 sreg_t v = MMU.load_int64(RS1);
 MMU.store_uint64(RS1, std::max(sreg_t(RS2),v));
 WRITE_RD(v);
diff --git a/riscv/insns/amomaxu_d.h b/riscv/insns/amomaxu_d.h
index ef003c6..dbdb1d2 100644
--- a/riscv/insns/amomaxu_d.h
+++ b/riscv/insns/amomaxu_d.h
@@ -1,4 +1,4 @@
-require_xpr64;
+require_rv64;
 reg_t v = MMU.load_uint64(RS1);
 MMU.store_uint64(RS1, std::max(RS2,v));
 WRITE_RD(v);
diff --git a/riscv/insns/amomin_d.h b/riscv/insns/amomin_d.h
index 62915bb..2ad8eef 100644
--- a/riscv/insns/amomin_d.h
+++ b/riscv/insns/amomin_d.h
@@ -1,4 +1,4 @@
-require_xpr64;
+require_rv64;
 sreg_t v = MMU.load_int64(RS1);
 MMU.store_uint64(RS1, std::min(sreg_t(RS2),v));
 WRITE_RD(v);
diff --git a/riscv/insns/amominu_d.h b/riscv/insns/amominu_d.h
index 5543d5e..88fe724 100644
--- a/riscv/insns/amominu_d.h
+++ b/riscv/insns/amominu_d.h
@@ -1,4 +1,4 @@
-require_xpr64;
+require_rv64;
 reg_t v = MMU.load_uint64(RS1);
 MMU.store_uint64(RS1, std::min(RS2,v));
 WRITE_RD(v);
diff --git a/riscv/insns/amoor_d.h b/riscv/insns/amoor_d.h
index 500803f..58a64e0 100644
--- a/riscv/insns/amoor_d.h
+++ b/riscv/insns/amoor_d.h
@@ -1,4 +1,4 @@
-require_xpr64;
+require_rv64;
 reg_t v = MMU.load_uint64(RS1);
 MMU.store_uint64(RS1, RS2 | v);
 WRITE_RD(v);
diff --git a/riscv/insns/amoswap_d.h b/riscv/insns/amoswap_d.h
index f03d2aa..9f34eaa 100644
--- a/riscv/insns/amoswap_d.h
+++ b/riscv/insns/amoswap_d.h
@@ -1,4 +1,4 @@
-require_xpr64;
+require_rv64;
 reg_t v = MMU.load_uint64(RS1);
 MMU.store_uint64(RS1, RS2);
 WRITE_RD(v);
diff --git a/riscv/insns/amoxor_d.h b/riscv/insns/amoxor_d.h
index c78e7e3..acd8b61 100644
--- a/riscv/insns/amoxor_d.h
+++ b/riscv/insns/amoxor_d.h
@@ -1,4 +1,4 @@
-require_xpr64;
+require_rv64;
 reg_t v = MMU.load_uint64(RS1);
 MMU.store_uint64(RS1, RS2 ^ v);
 WRITE_RD(v);
diff --git a/riscv/insns/csrrc.h b/riscv/insns/csrrc.h
index 4667fc8..74a6872 100644
--- a/riscv/insns/csrrc.h
+++ b/riscv/insns/csrrc.h
@@ -1,4 +1,4 @@
 int csr = validate_csr(insn.csr(), true);
-reg_t old = p->get_pcr(csr);
-p->set_pcr(csr, old & ~RS1);
+reg_t old = p->get_csr(csr);
+p->set_csr(csr, old & ~RS1);
 WRITE_RD(sext_xlen(old));
diff --git a/riscv/insns/csrrci.h b/riscv/insns/csrrci.h
index 172aea0..993f2d8 100644
--- a/riscv/insns/csrrci.h
+++ b/riscv/insns/csrrci.h
@@ -1,4 +1,4 @@
 int csr = validate_csr(insn.csr(), true);
-reg_t old = p->get_pcr(csr);
-p->set_pcr(csr, old & ~(reg_t)insn.rs1());
+reg_t old = p->get_csr(csr);
+p->set_csr(csr, old & ~(reg_t)insn.rs1());
 WRITE_RD(sext_xlen(old));
diff --git a/riscv/insns/csrrs.h b/riscv/insns/csrrs.h
index 6616855..72b49bb 100644
--- a/riscv/insns/csrrs.h
+++ b/riscv/insns/csrrs.h
@@ -1,4 +1,4 @@
 int csr = validate_csr(insn.csr(), insn.rs1() != 0);
-reg_t old = p->get_pcr(csr);
-p->set_pcr(csr, old | RS1);
+reg_t old = p->get_csr(csr);
+p->set_csr(csr, old | RS1);
 WRITE_RD(sext_xlen(old));
diff --git a/riscv/insns/csrrsi.h b/riscv/insns/csrrsi.h
index 913c20a..90a4436 100644
--- a/riscv/insns/csrrsi.h
+++ b/riscv/insns/csrrsi.h
@@ -1,4 +1,4 @@
 int csr = validate_csr(insn.csr(), true);
-reg_t old = p->get_pcr(csr);
-p->set_pcr(csr, old | insn.rs1());
+reg_t old = p->get_csr(csr);
+p->set_csr(csr, old | insn.rs1());
 WRITE_RD(sext_xlen(old));
diff --git a/riscv/insns/csrrw.h b/riscv/insns/csrrw.h
index b981665..9f2324f 100644
--- a/riscv/insns/csrrw.h
+++ b/riscv/insns/csrrw.h
@@ -1,4 +1,4 @@
 int csr = validate_csr(insn.csr(), true);
-reg_t old = p->get_pcr(csr);
-p->set_pcr(csr, RS1);
+reg_t old = p->get_csr(csr);
+p->set_csr(csr, RS1);
 WRITE_RD(sext_xlen(old));
diff --git a/riscv/insns/csrrwi.h b/riscv/insns/csrrwi.h
index cbee6b9..cf0710f 100644
--- a/riscv/insns/csrrwi.h
+++ b/riscv/insns/csrrwi.h
@@ -1,4 +1,4 @@
 int csr = validate_csr(insn.csr(), true);
-reg_t old = p->get_pcr(csr);
-p->set_pcr(csr, insn.rs1());
+reg_t old = p->get_csr(csr);
+p->set_csr(csr, insn.rs1());
 WRITE_RD(sext_xlen(old));
diff --git a/riscv/insns/divuw.h b/riscv/insns/divuw.h
index a717658..a613d95 100644
--- a/riscv/insns/divuw.h
+++ b/riscv/insns/divuw.h
@@ -1,4 +1,4 @@
-require_xpr64;
+require_rv64;
 reg_t lhs = zext32(RS1);
 reg_t rhs = zext32(RS2);
 if(rhs == 0)
diff --git a/riscv/insns/divw.h b/riscv/insns/divw.h
index 24f22fd..bd4e999 100644
--- a/riscv/insns/divw.h
+++ b/riscv/insns/divw.h
@@ -1,4 +1,4 @@
-require_xpr64;
+require_rv64;
 sreg_t lhs = sext32(RS1);
 sreg_t rhs = sext32(RS2);
 if(rhs == 0)
diff --git a/riscv/insns/fcvt_d_l.h b/riscv/insns/fcvt_d_l.h
index eab849a..e0e1824 100644
--- a/riscv/insns/fcvt_d_l.h
+++ b/riscv/insns/fcvt_d_l.h
@@ -1,4 +1,4 @@
-require_xpr64;
+require_rv64;
 require_fp;
 softfloat_roundingMode = RM;
 WRITE_FRD(i64_to_f64(RS1));
diff --git a/riscv/insns/fcvt_d_lu.h b/riscv/insns/fcvt_d_lu.h
index bef89eb..ee33848 100644
--- a/riscv/insns/fcvt_d_lu.h
+++ b/riscv/insns/fcvt_d_lu.h
@@ -1,4 +1,4 @@
-require_xpr64;
+require_rv64;
 require_fp;
 softfloat_roundingMode = RM;
 WRITE_FRD(ui64_to_f64(RS1));
diff --git a/riscv/insns/fcvt_l_d.h b/riscv/insns/fcvt_l_d.h
index bf03b71..55dbe27 100644
--- a/riscv/insns/fcvt_l_d.h
+++ b/riscv/insns/fcvt_l_d.h
@@ -1,4 +1,4 @@
-require_xpr64;
+require_rv64;
 require_fp;
 softfloat_roundingMode = RM;
 WRITE_RD(f64_to_i64(FRS1, RM, true));
diff --git a/riscv/insns/fcvt_l_s.h b/riscv/insns/fcvt_l_s.h
index 1259234..ea1e5a7 100644
--- a/riscv/insns/fcvt_l_s.h
+++ b/riscv/insns/fcvt_l_s.h
@@ -1,4 +1,4 @@
-require_xpr64;
+require_rv64;
 require_fp;
 softfloat_roundingMode = RM;
 WRITE_RD(f32_to_i64(FRS1, RM, true));
diff --git a/riscv/insns/fcvt_lu_d.h b/riscv/insns/fcvt_lu_d.h
index d69b36b..7be12ed 100644
--- a/riscv/insns/fcvt_lu_d.h
+++ b/riscv/insns/fcvt_lu_d.h
@@ -1,4 +1,4 @@
-require_xpr64;
+require_rv64;
 require_fp;
 softfloat_roundingMode = RM;
 WRITE_RD(f64_to_ui64(FRS1, RM, true));
diff --git a/riscv/insns/fcvt_lu_s.h b/riscv/insns/fcvt_lu_s.h
index e40605b..04501c1 100644
--- a/riscv/insns/fcvt_lu_s.h
+++ b/riscv/insns/fcvt_lu_s.h
@@ -1,4 +1,4 @@
-require_xpr64;
+require_rv64;
 require_fp;
 softfloat_roundingMode = RM;
 WRITE_RD(f32_to_ui64(FRS1, RM, true));
diff --git a/riscv/insns/fcvt_s_l.h b/riscv/insns/fcvt_s_l.h
index 98570ab..723b9e4 100644
--- a/riscv/insns/fcvt_s_l.h
+++ b/riscv/insns/fcvt_s_l.h
@@ -1,4 +1,4 @@
-require_xpr64;
+require_rv64;
 require_fp;
 softfloat_roundingMode = RM;
 WRITE_FRD(i64_to_f32(RS1));
diff --git a/riscv/insns/fcvt_s_lu.h b/riscv/insns/fcvt_s_lu.h
index 921bfcf..b58b395 100644
--- a/riscv/insns/fcvt_s_lu.h
+++ b/riscv/insns/fcvt_s_lu.h
@@ -1,4 +1,4 @@
-require_xpr64;
+require_rv64;
 require_fp;
 softfloat_roundingMode = RM;
 WRITE_FRD(ui64_to_f32(RS1));
diff --git a/riscv/insns/fmv_d_x.h b/riscv/insns/fmv_d_x.h
index 35c1977..f01811d 100644
--- a/riscv/insns/fmv_d_x.h
+++ b/riscv/insns/fmv_d_x.h
@@ -1,3 +1,3 @@
-require_xpr64;
+require_rv64;
 require_fp;
 WRITE_FRD(RS1);
diff --git a/riscv/insns/fmv_x_d.h b/riscv/insns/fmv_x_d.h
index 5bcf2b5..d3c1d7a 100644
--- a/riscv/insns/fmv_x_d.h
+++ b/riscv/insns/fmv_x_d.h
@@ -1,3 +1,3 @@
-require_xpr64;
+require_rv64;
 require_fp;
 WRITE_RD(FRS1);
diff --git a/riscv/insns/ld.h b/riscv/insns/ld.h
index d36e172..1122b98 100644
--- a/riscv/insns/ld.h
+++ b/riscv/insns/ld.h
@@ -1,2 +1,2 @@
-require_xpr64;
+require_rv64;
 WRITE_RD(MMU.load_int64(RS1 + insn.i_imm()));
diff --git a/riscv/insns/lr_d.h b/riscv/insns/lr_d.h
index 4e8ac18..94c4bf7 100644
--- a/riscv/insns/lr_d.h
+++ b/riscv/insns/lr_d.h
@@ -1,3 +1,3 @@
-require_xpr64;
+require_rv64;
 p->get_state()->load_reservation = RS1;
 WRITE_RD(MMU.load_int64(RS1));
diff --git a/riscv/insns/lwu.h b/riscv/insns/lwu.h
index 5535baf..dcc4d75 100644
--- a/riscv/insns/lwu.h
+++ b/riscv/insns/lwu.h
@@ -1,2 +1,2 @@
-require_xpr64;
+require_rv64;
 WRITE_RD(MMU.load_uint32(RS1 + insn.i_imm()));
diff --git a/riscv/insns/mcall.h b/riscv/insns/mcall.h
new file mode 100644
index 0000000..97f55f8
--- /dev/null
+++ b/riscv/insns/mcall.h
@@ -0,0 +1,2 @@
+require_privilege(PRV_S); // or PRV_H if implemented
+throw trap_mcall();
diff --git a/riscv/insns/mret.h b/riscv/insns/mret.h
new file mode 100644
index 0000000..7319a8f
--- /dev/null
+++ b/riscv/insns/mret.h
@@ -0,0 +1,3 @@
+require_privilege(PRV_M);
+p->pop_privilege_stack();
+set_pc(p->get_state()->mepc);
diff --git a/riscv/insns/mrts.h b/riscv/insns/mrts.h
new file mode 100644
index 0000000..34675b7
--- /dev/null
+++ b/riscv/insns/mrts.h
@@ -0,0 +1,6 @@
+require_privilege(PRV_M);
+p->set_csr(CSR_MSTATUS, set_field(STATE.mstatus, MSTATUS_PRV, PRV_S));
+STATE.sbadaddr = STATE.mbadaddr;
+STATE.scause = STATE.mcause;
+STATE.sepc = STATE.mepc;
+set_pc(STATE.stvec);
diff --git a/riscv/insns/mulh.h b/riscv/insns/mulh.h
index 8ae7520..567e213 100644
--- a/riscv/insns/mulh.h
+++ b/riscv/insns/mulh.h
@@ -1,4 +1,4 @@
-if (xpr64)
+if (xlen == 64)
   WRITE_RD(mulh(RS1, RS2));
 else
   WRITE_RD(sext32((sext32(RS1) * sext32(RS2)) >> 32));
diff --git a/riscv/insns/mulhsu.h b/riscv/insns/mulhsu.h
index 3168ade..5eeb89c 100644
--- a/riscv/insns/mulhsu.h
+++ b/riscv/insns/mulhsu.h
@@ -1,4 +1,4 @@
-if (xpr64)
+if (xlen == 64)
   WRITE_RD(mulhsu(RS1, RS2));
 else
   WRITE_RD(sext32((sext32(RS1) * reg_t((uint32_t)RS2)) >> 32));
diff --git a/riscv/insns/mulhu.h b/riscv/insns/mulhu.h
index b03b870..ce6a21e 100644
--- a/riscv/insns/mulhu.h
+++ b/riscv/insns/mulhu.h
@@ -1,4 +1,4 @@
-if (xpr64)
+if (xlen == 64)
   WRITE_RD(mulhu(RS1, RS2));
 else
   WRITE_RD(sext32(((uint64_t)(uint32_t)RS1 * (uint64_t)(uint32_t)RS2) >> 32));
diff --git a/riscv/insns/mulw.h b/riscv/insns/mulw.h
index 9f74fcf..184dd41 100644
--- a/riscv/insns/mulw.h
+++ b/riscv/insns/mulw.h
@@ -1,2 +1,2 @@
-require_xpr64;
+require_rv64;
 WRITE_RD(sext32(RS1 * RS2));
diff --git a/riscv/insns/remuw.h b/riscv/insns/remuw.h
index bec7059..e487516 100644
--- a/riscv/insns/remuw.h
+++ b/riscv/insns/remuw.h
@@ -1,4 +1,4 @@
-require_xpr64;
+require_rv64;
 reg_t lhs = zext32(RS1);
 reg_t rhs = zext32(RS2);
 if(rhs == 0)
diff --git a/riscv/insns/remw.h b/riscv/insns/remw.h
index b8f4597..2bae1a8 100644
--- a/riscv/insns/remw.h
+++ b/riscv/insns/remw.h
@@ -1,4 +1,4 @@
-require_xpr64;
+require_rv64;
 sreg_t lhs = sext32(RS1);
 sreg_t rhs = sext32(RS2);
 if(rhs == 0)
diff --git a/riscv/insns/sc_d.h b/riscv/insns/sc_d.h
index 3b48244..2108079 100644
--- a/riscv/insns/sc_d.h
+++ b/riscv/insns/sc_d.h
@@ -1,4 +1,4 @@
-require_xpr64;
+require_rv64;
 if (RS1 == p->get_state()->load_reservation)
 {
   MMU.store_uint64(RS1, RS2);
diff --git a/riscv/insns/scall.h b/riscv/insns/scall.h
index b31b7e6..306a160 100644
--- a/riscv/insns/scall.h
+++ b/riscv/insns/scall.h
@@ -1 +1 @@
-throw trap_syscall();
+throw trap_scall();
diff --git a/riscv/insns/sd.h b/riscv/insns/sd.h
index 9364d87..664deb2 100644
--- a/riscv/insns/sd.h
+++ b/riscv/insns/sd.h
@@ -1,2 +1,2 @@
-require_xpr64;
+require_rv64;
 MMU.store_uint64(RS1 + insn.s_imm(), RS2);
diff --git a/riscv/insns/sfence_vm.h b/riscv/insns/sfence_vm.h
new file mode 100644
index 0000000..35ff5dd
--- /dev/null
+++ b/riscv/insns/sfence_vm.h
@@ -0,0 +1,2 @@
+require_privilege(PRV_S);
+MMU.flush_tlb();
diff --git a/riscv/insns/slli.h b/riscv/insns/slli.h
index ff9c8c3..7291276 100644
--- a/riscv/insns/slli.h
+++ b/riscv/insns/slli.h
@@ -1,4 +1,4 @@
-if(xpr64)
+if (xlen == 64)
   WRITE_RD(RS1 << SHAMT);
 else
 {
diff --git a/riscv/insns/slliw.h b/riscv/insns/slliw.h
index fdb51be..c1fda65 100644
--- a/riscv/insns/slliw.h
+++ b/riscv/insns/slliw.h
@@ -1,2 +1,2 @@
-require_xpr64;
+require_rv64;
 WRITE_RD(sext32(RS1 << SHAMT));
diff --git a/riscv/insns/sllw.h b/riscv/insns/sllw.h
index 25e717a..affe894 100644
--- a/riscv/insns/sllw.h
+++ b/riscv/insns/sllw.h
@@ -1,2 +1,2 @@
-require_xpr64;
+require_rv64;
 WRITE_RD(sext32(RS1 << (RS2 & 0x1F)));
diff --git a/riscv/insns/srai.h b/riscv/insns/srai.h
index 7fdbdf3..69066ef 100644
--- a/riscv/insns/srai.h
+++ b/riscv/insns/srai.h
@@ -1,4 +1,4 @@
-if(xpr64)
+if (xlen == 64)
   WRITE_RD(sreg_t(RS1) >> SHAMT);
 else
 {
diff --git a/riscv/insns/sraiw.h b/riscv/insns/sraiw.h
index 242c97e..b344459 100644
--- a/riscv/insns/sraiw.h
+++ b/riscv/insns/sraiw.h
@@ -1,2 +1,2 @@
-require_xpr64;
+require_rv64;
 WRITE_RD(sext32(int32_t(RS1) >> SHAMT));
diff --git a/riscv/insns/sraw.h b/riscv/insns/sraw.h
index 29640bf..ca9c0c7 100644
--- a/riscv/insns/sraw.h
+++ b/riscv/insns/sraw.h
@@ -1,2 +1,2 @@
-require_xpr64;
+require_rv64;
 WRITE_RD(sext32(int32_t(RS1) >> (RS2 & 0x1F)));
diff --git a/riscv/insns/sret.h b/riscv/insns/sret.h
index 442b00b..34fdb0d 100644
--- a/riscv/insns/sret.h
+++ b/riscv/insns/sret.h
@@ -1,5 +1,3 @@
-require_supervisor;
-p->set_pcr(CSR_STATUS, ((p->get_state()->sr & ~(SR_S | SR_EI)) |
-                       ((p->get_state()->sr & SR_PS) ? SR_S : 0)) |
-                       ((p->get_state()->sr & SR_PEI) ? SR_EI : 0));
-set_pc(p->get_state()->epc);
+require_privilege(PRV_S);
+p->pop_privilege_stack();
+set_pc(p->get_state()->sepc);
diff --git a/riscv/insns/srl.h b/riscv/insns/srl.h
index 9b1eb21..0eb948b 100644
--- a/riscv/insns/srl.h
+++ b/riscv/insns/srl.h
@@ -1,4 +1,4 @@
-if(xpr64)
+if (xlen == 64)
   WRITE_RD(RS1 >> (RS2 & 0x3F));
 else
   WRITE_RD(sext32((uint32_t)RS1 >> (RS2 & 0x1F)));
diff --git a/riscv/insns/srli.h b/riscv/insns/srli.h
index fee136c..0cdc853 100644
--- a/riscv/insns/srli.h
+++ b/riscv/insns/srli.h
@@ -1,4 +1,4 @@
-if(xpr64)
+if (xlen == 64)
   WRITE_RD(RS1 >> SHAMT);
 else
 {
diff --git a/riscv/insns/srliw.h b/riscv/insns/srliw.h
index 0b6f9b8..c657d3d 100644
--- a/riscv/insns/srliw.h
+++ b/riscv/insns/srliw.h
@@ -1,2 +1,2 @@
-require_xpr64;
+require_rv64;
 WRITE_RD(sext32((uint32_t)RS1 >> SHAMT));
diff --git a/riscv/insns/srlw.h b/riscv/insns/srlw.h
index 21ca502..a8eb451 100644
--- a/riscv/insns/srlw.h
+++ b/riscv/insns/srlw.h
@@ -1,2 +1,2 @@
-require_xpr64;
+require_rv64;
 WRITE_RD(sext32((uint32_t)RS1 >> (RS2 & 0x1F)));
diff --git a/riscv/insns/subw.h b/riscv/insns/subw.h
index dce982f..b4168ef 100644
--- a/riscv/insns/subw.h
+++ b/riscv/insns/subw.h
@@ -1,3 +1,3 @@
-require_xpr64;
+require_rv64;
 WRITE_RD(sext32(RS1 - RS2));