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| author | Andrew Waterman <andrew@sifive.com> | 2018-04-04 13:00:29 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2018-04-04 13:00:29 -0700 |
| commit | 4856220f05094a870e9544523428b85ec597fd42 (patch) | |
| tree | f7404706ce99de225b4a266ca5c45400c456ad64 /riscv/insns | |
| parent | 3242d9b91811a52a06c1eeeb14c0de898800e0d4 (diff) | |
| download | spike-4856220f05094a870e9544523428b85ec597fd42.zip spike-4856220f05094a870e9544523428b85ec597fd42.tar.gz spike-4856220f05094a870e9544523428b85ec597fd42.tar.bz2 | |
Revert "Fix for issue #183: No illegal instruction exception for c.sxxi instructions encoded with zero shift amount"
This reverts commit be0555d585b332fd0496affe559c0a5a4e7e5644.
See #190
Diffstat (limited to 'riscv/insns')
| -rw-r--r-- | riscv/insns/c_slli.h | 2 | ||||
| -rw-r--r-- | riscv/insns/c_srai.h | 2 | ||||
| -rw-r--r-- | riscv/insns/c_srli.h | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/riscv/insns/c_slli.h b/riscv/insns/c_slli.h index 19d7908..24fbb13 100644 --- a/riscv/insns/c_slli.h +++ b/riscv/insns/c_slli.h @@ -1,3 +1,3 @@ require_extension('C'); -require(insn.rvc_zimm() < xlen && insn.rvc_zimm() > 0); +require(insn.rvc_zimm() < xlen); WRITE_RD(sext_xlen(RVC_RS1 << insn.rvc_zimm())); diff --git a/riscv/insns/c_srai.h b/riscv/insns/c_srai.h index 7b594e9..f6638b1 100644 --- a/riscv/insns/c_srai.h +++ b/riscv/insns/c_srai.h @@ -1,3 +1,3 @@ require_extension('C'); -require(insn.rvc_zimm() < xlen && insn.rvc_zimm() > 0); +require(insn.rvc_zimm() < xlen); WRITE_RVC_RS1S(sext_xlen(sext_xlen(RVC_RS1S) >> insn.rvc_zimm())); diff --git a/riscv/insns/c_srli.h b/riscv/insns/c_srli.h index 008ae62..f410fef 100644 --- a/riscv/insns/c_srli.h +++ b/riscv/insns/c_srli.h @@ -1,3 +1,3 @@ require_extension('C'); -require(insn.rvc_zimm() < xlen && insn.rvc_zimm() > 0); +require(insn.rvc_zimm() < xlen); WRITE_RVC_RS1S(sext_xlen(zext_xlen(RVC_RS1S) >> insn.rvc_zimm())); |