Reorganized directory structure

Moved cross-compiler to /xcc/ rather than /
Added ISA sim in /sim/
Added Proxy Kernel in /pk/ (to be cleaned up)
Added opcode map to /opcodes/ (ditto)
Added documentation to /doc/

122 files changed, 180 insertions, 0 deletions

diff --git a/riscv/insns/abs_fmt.h b/riscv/insns/abs_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/abs_fmt.h
diff --git a/riscv/insns/add.h b/riscv/insns/add.h
new file mode 100644
index 0000000..c50729f
--- /dev/null
+++ b/riscv/insns/add.h
@@ -0,0 +1,2 @@
+RD = sext32(RS + RT);
+
diff --git a/riscv/insns/add_fmt.h b/riscv/insns/add_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/add_fmt.h
diff --git a/riscv/insns/addi.h b/riscv/insns/addi.h
new file mode 100644
index 0000000..c84299d
--- /dev/null
+++ b/riscv/insns/addi.h
@@ -0,0 +1 @@
+RT = sext32(RS + SIMM);
diff --git a/riscv/insns/and.h b/riscv/insns/and.h
new file mode 100644
index 0000000..b109b53
--- /dev/null
+++ b/riscv/insns/and.h
@@ -0,0 +1 @@
+RD = RS & RT;
diff --git a/riscv/insns/andi.h b/riscv/insns/andi.h
new file mode 100644
index 0000000..669b658
--- /dev/null
+++ b/riscv/insns/andi.h
@@ -0,0 +1 @@
+RT = RS & IMM;
diff --git a/riscv/insns/beq.h b/riscv/insns/beq.h
new file mode 100644
index 0000000..3ebde2f
--- /dev/null
+++ b/riscv/insns/beq.h
@@ -0,0 +1,2 @@
+if(cmp_trunc(RS) == cmp_trunc(RT))
+  npc = BRANCH_TARGET;
diff --git a/riscv/insns/ble.h b/riscv/insns/ble.h
new file mode 100644
index 0000000..f5e2196
--- /dev/null
+++ b/riscv/insns/ble.h
@@ -0,0 +1,2 @@
+if(sreg_t(cmp_trunc(RS)) <= sreg_t(cmp_trunc(RT)))
+  npc = BRANCH_TARGET;
diff --git a/riscv/insns/bleu.h b/riscv/insns/bleu.h
new file mode 100644
index 0000000..c2c1139
--- /dev/null
+++ b/riscv/insns/bleu.h
@@ -0,0 +1,2 @@
+if(cmp_trunc(RS) <= cmp_trunc(RT))
+  npc = BRANCH_TARGET;
diff --git a/riscv/insns/blt.h b/riscv/insns/blt.h
new file mode 100644
index 0000000..1010133
--- /dev/null
+++ b/riscv/insns/blt.h
@@ -0,0 +1,2 @@
+if(sreg_t(cmp_trunc(RS)) < sreg_t(cmp_trunc(RT)))
+  npc = BRANCH_TARGET;
diff --git a/riscv/insns/bltu.h b/riscv/insns/bltu.h
new file mode 100644
index 0000000..a911aea
--- /dev/null
+++ b/riscv/insns/bltu.h
@@ -0,0 +1,2 @@
+if(cmp_trunc(RS) < cmp_trunc(RT))
+  npc = BRANCH_TARGET;
diff --git a/riscv/insns/bne.h b/riscv/insns/bne.h
new file mode 100644
index 0000000..a97d81a
--- /dev/null
+++ b/riscv/insns/bne.h
@@ -0,0 +1,2 @@
+if(cmp_trunc(RS) != cmp_trunc(RT))
+  npc = BRANCH_TARGET;
diff --git a/riscv/insns/break.h b/riscv/insns/break.h
new file mode 100644
index 0000000..7fd3d66
--- /dev/null
+++ b/riscv/insns/break.h
@@ -0,0 +1 @@
+throw trap_breakpoint;
diff --git a/riscv/insns/c_eq_fmt.h b/riscv/insns/c_eq_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/c_eq_fmt.h
diff --git a/riscv/insns/c_f_fmt.h b/riscv/insns/c_f_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/c_f_fmt.h
diff --git a/riscv/insns/c_le_fmt.h b/riscv/insns/c_le_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/c_le_fmt.h
diff --git a/riscv/insns/c_lt_fmt.h b/riscv/insns/c_lt_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/c_lt_fmt.h
diff --git a/riscv/insns/c_nge_fmt.h b/riscv/insns/c_nge_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/c_nge_fmt.h
diff --git a/riscv/insns/c_ngl_fmt.h b/riscv/insns/c_ngl_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/c_ngl_fmt.h
diff --git a/riscv/insns/c_ngle_fmt.h b/riscv/insns/c_ngle_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/c_ngle_fmt.h
diff --git a/riscv/insns/c_ngt_fmt.h b/riscv/insns/c_ngt_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/c_ngt_fmt.h
diff --git a/riscv/insns/c_ole_fmt.h b/riscv/insns/c_ole_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/c_ole_fmt.h
diff --git a/riscv/insns/c_olt_fmt.h b/riscv/insns/c_olt_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/c_olt_fmt.h
diff --git a/riscv/insns/c_seq_fmt.h b/riscv/insns/c_seq_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/c_seq_fmt.h
diff --git a/riscv/insns/c_sf_fmt.h b/riscv/insns/c_sf_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/c_sf_fmt.h
diff --git a/riscv/insns/c_ueq_fmt.h b/riscv/insns/c_ueq_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/c_ueq_fmt.h
diff --git a/riscv/insns/c_ule_fmt.h b/riscv/insns/c_ule_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/c_ule_fmt.h
diff --git a/riscv/insns/c_ult_fmt.h b/riscv/insns/c_ult_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/c_ult_fmt.h
diff --git a/riscv/insns/c_un_fmt.h b/riscv/insns/c_un_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/c_un_fmt.h
diff --git a/riscv/insns/ceil_l_fmt.h b/riscv/insns/ceil_l_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/ceil_l_fmt.h
diff --git a/riscv/insns/ceil_w_fmt.h b/riscv/insns/ceil_w_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/ceil_w_fmt.h
diff --git a/riscv/insns/cfc1.h b/riscv/insns/cfc1.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/cfc1.h
diff --git a/riscv/insns/ctc1.h b/riscv/insns/ctc1.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/ctc1.h
diff --git a/riscv/insns/cvt_d_fmt.h b/riscv/insns/cvt_d_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/cvt_d_fmt.h
diff --git a/riscv/insns/cvt_l_fmt.h b/riscv/insns/cvt_l_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/cvt_l_fmt.h
diff --git a/riscv/insns/cvt_s_fmt.h b/riscv/insns/cvt_s_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/cvt_s_fmt.h
diff --git a/riscv/insns/cvt_w_fmt.h b/riscv/insns/cvt_w_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/cvt_w_fmt.h
diff --git a/riscv/insns/dadd.h b/riscv/insns/dadd.h
new file mode 100644
index 0000000..13b42ce
--- /dev/null
+++ b/riscv/insns/dadd.h
@@ -0,0 +1,2 @@
+require64;
+RD = RS + RT;
diff --git a/riscv/insns/daddi.h b/riscv/insns/daddi.h
new file mode 100644
index 0000000..bd217a0
--- /dev/null
+++ b/riscv/insns/daddi.h
@@ -0,0 +1,2 @@
+require64;
+RT = RS + SIMM;
diff --git a/riscv/insns/ddiv.h b/riscv/insns/ddiv.h
new file mode 100644
index 0000000..009997e
--- /dev/null
+++ b/riscv/insns/ddiv.h
@@ -0,0 +1,2 @@
+require64;
+RD = sreg_t(RS) / sreg_t(RT);
diff --git a/riscv/insns/ddivu.h b/riscv/insns/ddivu.h
new file mode 100644
index 0000000..4034603
--- /dev/null
+++ b/riscv/insns/ddivu.h
@@ -0,0 +1,2 @@
+require64;
+RD = RS / RT;
diff --git a/riscv/insns/di.h b/riscv/insns/di.h
new file mode 100644
index 0000000..50bcda9
--- /dev/null
+++ b/riscv/insns/di.h
@@ -0,0 +1,4 @@
+require_supervisor;
+uint32_t temp = sr;
+set_sr(sr & ~SR_ET);
+RT = temp;
diff --git a/riscv/insns/div.h b/riscv/insns/div.h
new file mode 100644
index 0000000..5c02888
--- /dev/null
+++ b/riscv/insns/div.h
@@ -0,0 +1,2 @@
+RD = sext32(int32_t(RS)/int32_t(RT));
+
diff --git a/riscv/insns/div_fmt.h b/riscv/insns/div_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/div_fmt.h
diff --git a/riscv/insns/divu.h b/riscv/insns/divu.h
new file mode 100644
index 0000000..9ccf018
--- /dev/null
+++ b/riscv/insns/divu.h
@@ -0,0 +1,2 @@
+RD = sext32(uint32_t(RS)/uint32_t(RT));
+
diff --git a/riscv/insns/dmfc0.h b/riscv/insns/dmfc0.h
new file mode 100644
index 0000000..38b16b5
--- /dev/null
+++ b/riscv/insns/dmfc0.h
@@ -0,0 +1,20 @@
+require_supervisor;
+require64;
+
+switch(insn.rtype.rs)
+{
+  case 0:
+    RT = sr;
+    break;
+  case 1:
+    RT = epc;
+    break;
+  case 2:
+    RT = badvaddr;
+    break;
+  case 3:
+    RT = ebase;
+    break;
+  default:
+    RT = -1;
+}
diff --git a/riscv/insns/dmfc1.h b/riscv/insns/dmfc1.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/dmfc1.h
diff --git a/riscv/insns/dmtc0.h b/riscv/insns/dmtc0.h
new file mode 100644
index 0000000..0c9c4ff
--- /dev/null
+++ b/riscv/insns/dmtc0.h
@@ -0,0 +1,15 @@
+require_supervisor;
+require64;
+
+switch(insn.rtype.rs)
+{
+  case 0:
+    set_sr(RT);
+    break;
+  case 1:
+    epc = RT;
+    break;
+  case 3:
+    ebase = RT & ~0xFFF;
+    break;
+}
diff --git a/riscv/insns/dmtc1.h b/riscv/insns/dmtc1.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/dmtc1.h
diff --git a/riscv/insns/dmul.h b/riscv/insns/dmul.h
new file mode 100644
index 0000000..96c4128
--- /dev/null
+++ b/riscv/insns/dmul.h
@@ -0,0 +1,2 @@
+require64;
+RD = RS * RT;
diff --git a/riscv/insns/dsll.h b/riscv/insns/dsll.h
new file mode 100644
index 0000000..4051158
--- /dev/null
+++ b/riscv/insns/dsll.h
@@ -0,0 +1,2 @@
+require64;
+RD = RT << SHAMT;
diff --git a/riscv/insns/dsll32.h b/riscv/insns/dsll32.h
new file mode 100644
index 0000000..679f0e2
--- /dev/null
+++ b/riscv/insns/dsll32.h
@@ -0,0 +1,2 @@
+require64;
+RD = RT << (32+SHAMT);
diff --git a/riscv/insns/dsllv.h b/riscv/insns/dsllv.h
new file mode 100644
index 0000000..828e767
--- /dev/null
+++ b/riscv/insns/dsllv.h
@@ -0,0 +1,2 @@
+require64;
+RD = RT << (RS & 0x3F);
diff --git a/riscv/insns/dsra.h b/riscv/insns/dsra.h
new file mode 100644
index 0000000..60f9ad3
--- /dev/null
+++ b/riscv/insns/dsra.h
@@ -0,0 +1,2 @@
+require64;
+RD = sreg_t(RT) >> SHAMT;
diff --git a/riscv/insns/dsra32.h b/riscv/insns/dsra32.h
new file mode 100644
index 0000000..0a5907f
--- /dev/null
+++ b/riscv/insns/dsra32.h
@@ -0,0 +1,2 @@
+require64;
+RD = sreg_t(RT) >> (32+SHAMT);
diff --git a/riscv/insns/dsrav.h b/riscv/insns/dsrav.h
new file mode 100644
index 0000000..27dba05
--- /dev/null
+++ b/riscv/insns/dsrav.h
@@ -0,0 +1,2 @@
+require64;
+RD = RT >> (RS & 0x3F);
diff --git a/riscv/insns/dsrl.h b/riscv/insns/dsrl.h
new file mode 100644
index 0000000..efc69e1
--- /dev/null
+++ b/riscv/insns/dsrl.h
@@ -0,0 +1,2 @@
+require64;
+RD = RT >> SHAMT;
diff --git a/riscv/insns/dsrl32.h b/riscv/insns/dsrl32.h
new file mode 100644
index 0000000..f1bc91e
--- /dev/null
+++ b/riscv/insns/dsrl32.h
@@ -0,0 +1,2 @@
+require64;
+RD = RT >> (32+SHAMT);
diff --git a/riscv/insns/dsrlv.h b/riscv/insns/dsrlv.h
new file mode 100644
index 0000000..27dba05
--- /dev/null
+++ b/riscv/insns/dsrlv.h
@@ -0,0 +1,2 @@
+require64;
+RD = RT >> (RS & 0x3F);
diff --git a/riscv/insns/dsub.h b/riscv/insns/dsub.h
new file mode 100644
index 0000000..1c6f1c0
--- /dev/null
+++ b/riscv/insns/dsub.h
@@ -0,0 +1,2 @@
+require64;
+RD = RS - RT;
diff --git a/riscv/insns/ei.h b/riscv/insns/ei.h
new file mode 100644
index 0000000..6d13be0
--- /dev/null
+++ b/riscv/insns/ei.h
@@ -0,0 +1,4 @@
+require_supervisor;
+uint32_t temp = sr;
+set_sr(sr | SR_ET);
+RT = temp;
diff --git a/riscv/insns/eret.h b/riscv/insns/eret.h
new file mode 100644
index 0000000..37e8588
--- /dev/null
+++ b/riscv/insns/eret.h
@@ -0,0 +1,5 @@
+require_supervisor;
+if(sr & SR_ET)
+  throw trap_illegal_instruction;
+set_sr(((sr & SR_PS) ? sr : (sr & ~SR_S)) | SR_ET);
+npc = epc;
diff --git a/riscv/insns/floor_l_fmt.h b/riscv/insns/floor_l_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/floor_l_fmt.h
diff --git a/riscv/insns/floor_w_fmt.h b/riscv/insns/floor_w_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/floor_w_fmt.h
diff --git a/riscv/insns/j.h b/riscv/insns/j.h
new file mode 100644
index 0000000..8abe0ba
--- /dev/null
+++ b/riscv/insns/j.h
@@ -0,0 +1 @@
+npc = JUMP_TARGET;
diff --git a/riscv/insns/jal.h b/riscv/insns/jal.h
new file mode 100644
index 0000000..7995b15
--- /dev/null
+++ b/riscv/insns/jal.h
@@ -0,0 +1,2 @@
+R[31] = npc;
+npc = JUMP_TARGET;
diff --git a/riscv/insns/jalr.h b/riscv/insns/jalr.h
new file mode 100644
index 0000000..18341e0
--- /dev/null
+++ b/riscv/insns/jalr.h
@@ -0,0 +1,3 @@
+uint32_t temp = npc;
+npc = RS;
+RD = temp;
diff --git a/riscv/insns/l_d.h b/riscv/insns/l_d.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/l_d.h
diff --git a/riscv/insns/l_s.h b/riscv/insns/l_s.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/l_s.h
diff --git a/riscv/insns/lb.h b/riscv/insns/lb.h
new file mode 100644
index 0000000..ed1c100
--- /dev/null
+++ b/riscv/insns/lb.h
@@ -0,0 +1 @@
+RT = mmu.load_int8(RS+SIMM);
diff --git a/riscv/insns/lbu.h b/riscv/insns/lbu.h
new file mode 100644
index 0000000..020fd19
--- /dev/null
+++ b/riscv/insns/lbu.h
@@ -0,0 +1 @@
+RT = mmu.load_uint8(RS+SIMM);
diff --git a/riscv/insns/ld.h b/riscv/insns/ld.h
new file mode 100644
index 0000000..45bbcc2
--- /dev/null
+++ b/riscv/insns/ld.h
@@ -0,0 +1,2 @@
+require64;
+RT = mmu.load_int64(RS+SIMM);
diff --git a/riscv/insns/lh.h b/riscv/insns/lh.h
new file mode 100644
index 0000000..f0ef500
--- /dev/null
+++ b/riscv/insns/lh.h
@@ -0,0 +1 @@
+RT = mmu.load_int16(RS+SIMM);
diff --git a/riscv/insns/lhu.h b/riscv/insns/lhu.h
new file mode 100644
index 0000000..6d77f04
--- /dev/null
+++ b/riscv/insns/lhu.h
@@ -0,0 +1 @@
+RT = mmu.load_uint16(RS+SIMM);
diff --git a/riscv/insns/lui.h b/riscv/insns/lui.h
new file mode 100644
index 0000000..0be0c9b
--- /dev/null
+++ b/riscv/insns/lui.h
@@ -0,0 +1 @@
+RT = IMM << 16;
diff --git a/riscv/insns/lw.h b/riscv/insns/lw.h
new file mode 100644
index 0000000..123b4a8
--- /dev/null
+++ b/riscv/insns/lw.h
@@ -0,0 +1 @@
+RT = mmu.load_int32(RS+SIMM);
diff --git a/riscv/insns/lwu.h b/riscv/insns/lwu.h
new file mode 100644
index 0000000..af7dfc9
--- /dev/null
+++ b/riscv/insns/lwu.h
@@ -0,0 +1 @@
+RT = mmu.load_uint32(RS+SIMM);
diff --git a/riscv/insns/mfc0.h b/riscv/insns/mfc0.h
new file mode 100644
index 0000000..9d3595e
--- /dev/null
+++ b/riscv/insns/mfc0.h
@@ -0,0 +1,19 @@
+require_supervisor;
+
+switch(insn.rtype.rs)
+{
+  case 0:
+    RT = sext32(sr);
+    break;
+  case 1:
+    RT = sext32(epc);
+    break;
+  case 2:
+    RT = sext32(badvaddr);
+    break;
+  case 3:
+    RT = sext32(ebase);
+    break;
+  default:
+    RT = -1;
+}
diff --git a/riscv/insns/mfc1.h b/riscv/insns/mfc1.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/mfc1.h
diff --git a/riscv/insns/mfhc1.h b/riscv/insns/mfhc1.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/mfhc1.h
diff --git a/riscv/insns/mov_fmt.h b/riscv/insns/mov_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/mov_fmt.h
diff --git a/riscv/insns/movn.h b/riscv/insns/movn.h
new file mode 100644
index 0000000..8688b0e
--- /dev/null
+++ b/riscv/insns/movn.h
@@ -0,0 +1 @@
+if(RT) RD = RS;
diff --git a/riscv/insns/movz.h b/riscv/insns/movz.h
new file mode 100644
index 0000000..35bf498
--- /dev/null
+++ b/riscv/insns/movz.h
@@ -0,0 +1 @@
+if(!RT) RD = RS;
diff --git a/riscv/insns/mtc0.h b/riscv/insns/mtc0.h
new file mode 100644
index 0000000..ee38f48
--- /dev/null
+++ b/riscv/insns/mtc0.h
@@ -0,0 +1,18 @@
+require_supervisor;
+
+switch(insn.rtype.rs)
+{
+  case 0:
+    set_sr(sext32(RT));
+    break;
+  case 1:
+    epc = sext32(RT);
+    break;
+  case 3:
+    ebase = sext32(RT & ~0xFFF);
+    break;
+  case 8:
+    char ch = RT;
+    demand(1 == write(1,&ch,1),"wtf");
+    break;
+}
diff --git a/riscv/insns/mtc1.h b/riscv/insns/mtc1.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/mtc1.h
diff --git a/riscv/insns/mthc1.h b/riscv/insns/mthc1.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/mthc1.h
diff --git a/riscv/insns/mul.h b/riscv/insns/mul.h
new file mode 100644
index 0000000..3a8fa69
--- /dev/null
+++ b/riscv/insns/mul.h
@@ -0,0 +1,2 @@
+RD = sext32(RS * RT);
+
diff --git a/riscv/insns/mul_fmt.h b/riscv/insns/mul_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/mul_fmt.h
diff --git a/riscv/insns/neg_fmt.h b/riscv/insns/neg_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/neg_fmt.h
diff --git a/riscv/insns/nor.h b/riscv/insns/nor.h
new file mode 100644
index 0000000..1e8fa52
--- /dev/null
+++ b/riscv/insns/nor.h
@@ -0,0 +1 @@
+RD = ~(RS | RT);
diff --git a/riscv/insns/or.h b/riscv/insns/or.h
new file mode 100644
index 0000000..daee005
--- /dev/null
+++ b/riscv/insns/or.h
@@ -0,0 +1 @@
+RD = RS | RT;
diff --git a/riscv/insns/ori.h b/riscv/insns/ori.h
new file mode 100644
index 0000000..cfcf9e0
--- /dev/null
+++ b/riscv/insns/ori.h
@@ -0,0 +1 @@
+RT = RS | IMM;
diff --git a/riscv/insns/rdhwr.h b/riscv/insns/rdhwr.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/rdhwr.h
diff --git a/riscv/insns/round_l_fmt.h b/riscv/insns/round_l_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/round_l_fmt.h
diff --git a/riscv/insns/round_w_fmt.h b/riscv/insns/round_w_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/round_w_fmt.h
diff --git a/riscv/insns/s_d.h b/riscv/insns/s_d.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/s_d.h
diff --git a/riscv/insns/s_s.h b/riscv/insns/s_s.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/s_s.h
diff --git a/riscv/insns/sb.h b/riscv/insns/sb.h
new file mode 100644
index 0000000..f70b2ef
--- /dev/null
+++ b/riscv/insns/sb.h
@@ -0,0 +1 @@
+mmu.store_uint8(RS+SIMM, RT);
diff --git a/riscv/insns/sd.h b/riscv/insns/sd.h
new file mode 100644
index 0000000..03e6416
--- /dev/null
+++ b/riscv/insns/sd.h
@@ -0,0 +1,2 @@
+require64;
+mmu.store_uint64(RS+SIMM, RT);
diff --git a/riscv/insns/sh.h b/riscv/insns/sh.h
new file mode 100644
index 0000000..72e24cc
--- /dev/null
+++ b/riscv/insns/sh.h
@@ -0,0 +1 @@
+mmu.store_uint16(RS+SIMM, RT);
diff --git a/riscv/insns/sll.h b/riscv/insns/sll.h
new file mode 100644
index 0000000..fe32e89
--- /dev/null
+++ b/riscv/insns/sll.h
@@ -0,0 +1 @@
+RD = sext32(RT << SHAMT);
diff --git a/riscv/insns/sllv.h b/riscv/insns/sllv.h
new file mode 100644
index 0000000..eab1652
--- /dev/null
+++ b/riscv/insns/sllv.h
@@ -0,0 +1 @@
+RD = sext32(RT << (RS & 0x1F));
diff --git a/riscv/insns/slt.h b/riscv/insns/slt.h
new file mode 100644
index 0000000..62f8684
--- /dev/null
+++ b/riscv/insns/slt.h
@@ -0,0 +1 @@
+RD = sreg_t(cmp_trunc(RS)) < sreg_t(cmp_trunc(RT));
diff --git a/riscv/insns/slti.h b/riscv/insns/slti.h
new file mode 100644
index 0000000..6de88a5
--- /dev/null
+++ b/riscv/insns/slti.h
@@ -0,0 +1 @@
+RT = sreg_t(cmp_trunc(RS)) < sreg_t(cmp_trunc(SIMM));
diff --git a/riscv/insns/sltiu.h b/riscv/insns/sltiu.h
new file mode 100644
index 0000000..3b6390f
--- /dev/null
+++ b/riscv/insns/sltiu.h
@@ -0,0 +1 @@
+RT = cmp_trunc(RS) < cmp_trunc(SIMM);
diff --git a/riscv/insns/sltu.h b/riscv/insns/sltu.h
new file mode 100644
index 0000000..6687316
--- /dev/null
+++ b/riscv/insns/sltu.h
@@ -0,0 +1 @@
+RD = cmp_trunc(RS) < cmp_trunc(RT);
diff --git a/riscv/insns/sqrt_fmt.h b/riscv/insns/sqrt_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/sqrt_fmt.h
diff --git a/riscv/insns/sra.h b/riscv/insns/sra.h
new file mode 100644
index 0000000..ef43a4e
--- /dev/null
+++ b/riscv/insns/sra.h
@@ -0,0 +1 @@
+RD = sext32(sreg_t(RT) >> SHAMT);
diff --git a/riscv/insns/srav.h b/riscv/insns/srav.h
new file mode 100644
index 0000000..a07fc56
--- /dev/null
+++ b/riscv/insns/srav.h
@@ -0,0 +1 @@
+RD = sext32(sreg_t(RT) >> (RS & 0x1F));
diff --git a/riscv/insns/srl.h b/riscv/insns/srl.h
new file mode 100644
index 0000000..9895896
--- /dev/null
+++ b/riscv/insns/srl.h
@@ -0,0 +1 @@
+RD = sext32(RT >> SHAMT);
diff --git a/riscv/insns/srlv.h b/riscv/insns/srlv.h
new file mode 100644
index 0000000..931d43a
--- /dev/null
+++ b/riscv/insns/srlv.h
@@ -0,0 +1 @@
+RD = sext32(RT >> (RS & 0x1F));
diff --git a/riscv/insns/sub.h b/riscv/insns/sub.h
new file mode 100644
index 0000000..0618fb8
--- /dev/null
+++ b/riscv/insns/sub.h
@@ -0,0 +1,2 @@
+RD = sext32(RS - RT);
+
diff --git a/riscv/insns/sub_fmt.h b/riscv/insns/sub_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/sub_fmt.h
diff --git a/riscv/insns/sw.h b/riscv/insns/sw.h
new file mode 100644
index 0000000..7e9fff8
--- /dev/null
+++ b/riscv/insns/sw.h
@@ -0,0 +1 @@
+mmu.store_uint32(RS+SIMM, RT);
diff --git a/riscv/insns/sync.h b/riscv/insns/sync.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/sync.h
diff --git a/riscv/insns/synci.h b/riscv/insns/synci.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/synci.h
diff --git a/riscv/insns/syscall.h b/riscv/insns/syscall.h
new file mode 100644
index 0000000..2c7199d
--- /dev/null
+++ b/riscv/insns/syscall.h
@@ -0,0 +1 @@
+throw trap_syscall;
diff --git a/riscv/insns/trunc_l_fmt.h b/riscv/insns/trunc_l_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/trunc_l_fmt.h
diff --git a/riscv/insns/trunc_w_fmt.h b/riscv/insns/trunc_w_fmt.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/riscv/insns/trunc_w_fmt.h
diff --git a/riscv/insns/unimp.h b/riscv/insns/unimp.h
new file mode 100644
index 0000000..96f2a74
--- /dev/null
+++ b/riscv/insns/unimp.h
@@ -0,0 +1 @@
+throw trap_illegal_instruction;
diff --git a/riscv/insns/xor.h b/riscv/insns/xor.h
new file mode 100644
index 0000000..66896f4
--- /dev/null
+++ b/riscv/insns/xor.h
@@ -0,0 +1 @@
+RD = RS ^ RT;
diff --git a/riscv/insns/xori.h b/riscv/insns/xori.h
new file mode 100644
index 0000000..4814c5b
--- /dev/null
+++ b/riscv/insns/xori.h
@@ -0,0 +1 @@
+RT = RS ^ IMM;