rvv: add normal and widen reduction instructions

Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>

6 files changed, 36 insertions, 12 deletions

diff --git a/riscv/insns/vfredmax_vs.h b/riscv/insns/vfredmax_vs.h
index cb03dbb..1ab856b 100644
--- a/riscv/insns/vfredmax_vs.h
+++ b/riscv/insns/vfredmax_vs.h
@@ -1,6 +1,9 @@
 // vfredmax vd, vs2, vs1
 VI_VFP_VV_LOOP_REDUCTION
 ({
+  vd_0 = f16_max(vd_0, vs2);
+},
+{
   vd_0 = f32_max(vd_0, vs2);
 },
 {
diff --git a/riscv/insns/vfredmin_vs.h b/riscv/insns/vfredmin_vs.h
index 51c0bcb..37256cb 100644
--- a/riscv/insns/vfredmin_vs.h
+++ b/riscv/insns/vfredmin_vs.h
@@ -1,6 +1,9 @@
 // vfredmin vd, vs2, vs1
 VI_VFP_VV_LOOP_REDUCTION
 ({
+  vd_0 = f16_min(vd_0, vs2);
+},
+{
   vd_0 = f32_min(vd_0, vs2);
 },
 {
diff --git a/riscv/insns/vfredosum_vs.h b/riscv/insns/vfredosum_vs.h
index 7de6dbb..4564f9c 100644
--- a/riscv/insns/vfredosum_vs.h
+++ b/riscv/insns/vfredosum_vs.h
@@ -1,6 +1,9 @@
 // vfredosum: vd[0] =  sum( vs2[*] , vs1[0] )
 VI_VFP_VV_LOOP_REDUCTION
 ({
+  vd_0 = f16_add(vd_0, vs2);
+},
+{
   vd_0 = f32_add(vd_0, vs2);
 },
 {
diff --git a/riscv/insns/vfredsum_vs_parallel.h b/riscv/insns/vfredsum_vs_parallel.h
index d611c60..169d895 100644
--- a/riscv/insns/vfredsum_vs_parallel.h
+++ b/riscv/insns/vfredsum_vs_parallel.h
@@ -1,10 +1,15 @@
 // Parallel version of vfredsum
 // vfredsum: vd[0] =  sum( vs2[*] , vs1[0] )
-
 VI_CHECK_REDUCTION(false)
 VI_VFP_COMMON
 
 switch(p->VU.vsew) {
+  case e16: {
+    VI_VFP_LOOP_REDUCTIONSUM_INIT(16)
+    VI_VFP_LOOP_REDUCTIONSUM_MERGE(16)
+    VI_VFP_LOOP_REDUCTIONSUM_CLOSE(e16)
+    break;
+  }
   case e32: {
     VI_VFP_LOOP_REDUCTIONSUM_INIT(32)
     VI_VFP_LOOP_REDUCTIONSUM_MERGE(32)
@@ -17,7 +22,6 @@ switch(p->VU.vsew) {
     VI_VFP_LOOP_REDUCTIONSUM_CLOSE(e64)
     break;
   }
-  case e16:
   default:
     require(0);
     break;
diff --git a/riscv/insns/vfwredosum_vs.h b/riscv/insns/vfwredosum_vs.h
index 49c9ebf..22fb4df 100644
--- a/riscv/insns/vfwredosum_vs.h
+++ b/riscv/insns/vfwredosum_vs.h
@@ -1,8 +1,8 @@
 // vfwredosum.vs vd, vs2, vs1
-require_vector;
-require(P.VU.vsew * 2 <= P.VU.ELEN);
-require((insn.rs2() & (P.VU.vlmul - 1)) == 0);
 VI_VFP_VV_LOOP_WIDE_REDUCTION
 ({
+  vd_0 = f32_add(vd_0, vs2);
+},
+{
   vd_0 = f64_add(vd_0, vs2);
 })
diff --git a/riscv/insns/vfwredsum_vs_parallel.h b/riscv/insns/vfwredsum_vs_parallel.h
index 236d4d0..65b7c07 100644
--- a/riscv/insns/vfwredsum_vs_parallel.h
+++ b/riscv/insns/vfwredsum_vs_parallel.h
@@ -1,10 +1,21 @@
 // Parallel version of vfwredsum
-require_vector;
-require(P.VU.vsew * 2 <= P.VU.ELEN);
-require((insn.rs2() & (P.VU.vlmul - 1)) == 0);
-
+VI_CHECK_REDUCTION(false)
 VI_VFP_COMMON
 
-VI_VFP_LOOP_REDUCTIONSUM_WIDEN_INIT
-VI_VFP_LOOP_REDUCTIONSUM_MERGE(64)
-VI_VFP_LOOP_REDUCTIONSUM_CLOSE(e64)
+switch(p->VU.vsew) {
+  case e16: {
+    VI_VFP_LOOP_REDUCTIONSUM_WIDEN_INIT(16, 32)
+    VI_VFP_LOOP_REDUCTIONSUM_MERGE(32)
+    VI_VFP_LOOP_REDUCTIONSUM_CLOSE(e32)
+    break;
+  }
+  case e32: {
+    VI_VFP_LOOP_REDUCTIONSUM_WIDEN_INIT(32, 64)
+    VI_VFP_LOOP_REDUCTIONSUM_MERGE(64)
+    VI_VFP_LOOP_REDUCTIONSUM_CLOSE(e64)
+    break;
+  }
+  default:
+    require(0);
+    break;
+};