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authorChih-Min Chao <chihmin.chao@sifive.com>2020-05-20 01:55:46 -0700
committerChih-Min Chao <chihmin.chao@sifive.com>2020-05-20 11:38:45 -0700
commit5126f9ac6ba365a949e8125ea0caaa7185a0e542 (patch)
tree1deeab180cd2c740e7ac423586c62e82d7a3fa33 /riscv/insns
parentf3ea0d7081f5156df776ac70e245d5d63a44f03a (diff)
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rvv: refine st_index
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/insns')
-rw-r--r--riscv/insns/vsuxei16_v.h24
-rw-r--r--riscv/insns/vsuxei32_v.h24
-rw-r--r--riscv/insns/vsuxei64_v.h24
-rw-r--r--riscv/insns/vsuxei8_v.h24
-rw-r--r--riscv/insns/vsxei16_v.h24
-rw-r--r--riscv/insns/vsxei32_v.h24
-rw-r--r--riscv/insns/vsxei64_v.h24
-rw-r--r--riscv/insns/vsxei8_v.h24
8 files changed, 8 insertions, 184 deletions
diff --git a/riscv/insns/vsuxei16_v.h b/riscv/insns/vsuxei16_v.h
index 98435f6..f361c03 100644
--- a/riscv/insns/vsuxei16_v.h
+++ b/riscv/insns/vsuxei16_v.h
@@ -1,24 +1,2 @@
// vsuxe16.v
-VI_DUPLICATE_VREG(insn.rs2(), 16);
-
-switch(P.VU.vsew) {
- case e8: {
- VI_ST_INDEX(index[i], fn, uint8, false);
- }
- break;
- case e16: {
- VI_ST_INDEX(index[i], fn, uint16, false);
- }
- break;
- case e32: {
- VI_ST_INDEX(index[i], fn, uint32, false);
- }
- break;
- case e64: {
- VI_ST_INDEX(index[i], fn, uint64, false);
- }
- break;
- default:
- require(0);
- break;
-};
+VI_ST_INDEX(e16, false);
diff --git a/riscv/insns/vsuxei32_v.h b/riscv/insns/vsuxei32_v.h
index cdfb592..c1c8dc7 100644
--- a/riscv/insns/vsuxei32_v.h
+++ b/riscv/insns/vsuxei32_v.h
@@ -1,24 +1,2 @@
// vsuxe32.v
-VI_DUPLICATE_VREG(insn.rs2(), 32);
-
-switch(P.VU.vsew) {
- case e8: {
- VI_ST_INDEX(index[i], fn, uint8, false);
- }
- break;
- case e16: {
- VI_ST_INDEX(index[i], fn, uint16, false);
- }
- break;
- case e32: {
- VI_ST_INDEX(index[i], fn, uint32, false);
- }
- break;
- case e64: {
- VI_ST_INDEX(index[i], fn, uint64, false);
- }
- break;
- default:
- require(0);
- break;
-};
+VI_ST_INDEX(e32, false);
diff --git a/riscv/insns/vsuxei64_v.h b/riscv/insns/vsuxei64_v.h
index ed7cb50..0c619cf 100644
--- a/riscv/insns/vsuxei64_v.h
+++ b/riscv/insns/vsuxei64_v.h
@@ -1,24 +1,2 @@
// vsuxe64.v
-VI_DUPLICATE_VREG(insn.rs2(), 64);
-
-switch(P.VU.vsew) {
- case e8: {
- VI_ST_INDEX(index[i], fn, uint8, false);
- }
- break;
- case e16: {
- VI_ST_INDEX(index[i], fn, uint16, false);
- }
- break;
- case e32: {
- VI_ST_INDEX(index[i], fn, uint32, false);
- }
- break;
- case e64: {
- VI_ST_INDEX(index[i], fn, uint64, false);
- }
- break;
- default:
- require(0);
- break;
-};
+VI_ST_INDEX(e64, false);
diff --git a/riscv/insns/vsuxei8_v.h b/riscv/insns/vsuxei8_v.h
index ff7bde0..36d2a11 100644
--- a/riscv/insns/vsuxei8_v.h
+++ b/riscv/insns/vsuxei8_v.h
@@ -1,24 +1,2 @@
// vsuxe8.v
-VI_DUPLICATE_VREG(insn.rs2(), 8);
-
-switch(P.VU.vsew) {
- case e8: {
- VI_ST_INDEX(index[i], fn, uint8, false);
- }
- break;
- case e16: {
- VI_ST_INDEX(index[i], fn, uint16, false);
- }
- break;
- case e32: {
- VI_ST_INDEX(index[i], fn, uint32, false);
- }
- break;
- case e64: {
- VI_ST_INDEX(index[i], fn, uint64, false);
- }
- break;
- default:
- require(0);
- break;
-};
+VI_ST_INDEX(e8, false);
diff --git a/riscv/insns/vsxei16_v.h b/riscv/insns/vsxei16_v.h
index 72bb8e9..42c3c78 100644
--- a/riscv/insns/vsxei16_v.h
+++ b/riscv/insns/vsxei16_v.h
@@ -1,24 +1,2 @@
// vsxei16.v and vsxseg[2-8]ei16.v
-VI_DUPLICATE_VREG(insn.rs2(), 16);
-
-switch(P.VU.vsew) {
- case e8: {
- VI_ST_INDEX(index[i], fn, uint8, true);
- }
- break;
- case e16: {
- VI_ST_INDEX(index[i], fn, uint16, true);
- }
- break;
- case e32: {
- VI_ST_INDEX(index[i], fn, uint32, true);
- }
- break;
- case e64: {
- VI_ST_INDEX(index[i], fn, uint64, true);
- }
- break;
- default:
- require(0);
- break;
-};
+VI_ST_INDEX(e16, true);
diff --git a/riscv/insns/vsxei32_v.h b/riscv/insns/vsxei32_v.h
index 296c8bb..f0aed6b 100644
--- a/riscv/insns/vsxei32_v.h
+++ b/riscv/insns/vsxei32_v.h
@@ -1,24 +1,2 @@
// vsxei32.v and vsxseg[2-8]ei32.v
-VI_DUPLICATE_VREG(insn.rs2(), 32);
-
-switch(P.VU.vsew) {
- case e8: {
- VI_ST_INDEX(index[i], fn, uint8, true);
- }
- break;
- case e16: {
- VI_ST_INDEX(index[i], fn, uint16, true);
- }
- break;
- case e32: {
- VI_ST_INDEX(index[i], fn, uint32, true);
- }
- break;
- case e64: {
- VI_ST_INDEX(index[i], fn, uint64, true);
- }
- break;
- default:
- require(0);
- break;
-};
+VI_ST_INDEX(e32, true);
diff --git a/riscv/insns/vsxei64_v.h b/riscv/insns/vsxei64_v.h
index b5d286f..88ddaf3 100644
--- a/riscv/insns/vsxei64_v.h
+++ b/riscv/insns/vsxei64_v.h
@@ -1,24 +1,2 @@
// vsxei64.v and vsxseg[2-8]ei64.v
-VI_DUPLICATE_VREG(insn.rs2(), 64);
-
-switch(P.VU.vsew) {
- case e8: {
- VI_ST_INDEX(index[i], fn, uint8, true);
- }
- break;
- case e16: {
- VI_ST_INDEX(index[i], fn, uint16, true);
- }
- break;
- case e32: {
- VI_ST_INDEX(index[i], fn, uint32, true);
- }
- break;
- case e64: {
- VI_ST_INDEX(index[i], fn, uint64, true);
- }
- break;
- default:
- require(0);
- break;
-};
+VI_ST_INDEX(e64, true);
diff --git a/riscv/insns/vsxei8_v.h b/riscv/insns/vsxei8_v.h
index 355223c..621512c 100644
--- a/riscv/insns/vsxei8_v.h
+++ b/riscv/insns/vsxei8_v.h
@@ -1,24 +1,2 @@
// vsxei8.v and vsxseg[2-8]ei8.v
-VI_DUPLICATE_VREG(insn.rs2(), 8);
-
-switch(P.VU.vsew) {
- case e8: {
- VI_ST_INDEX(index[i], fn, uint8, true);
- }
- break;
- case e16: {
- VI_ST_INDEX(index[i], fn, uint16, true);
- }
- break;
- case e32: {
- VI_ST_INDEX(index[i], fn, uint32, true);
- }
- break;
- case e64: {
- VI_ST_INDEX(index[i], fn, uint64, true);
- }
- break;
- default:
- require(0);
- break;
-};
+VI_ST_INDEX(e8, true);