rvv: wrap align and overlap checking macro

Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>

5 files changed, 5 insertions, 5 deletions

diff --git a/riscv/insns/vl1r_v.h b/riscv/insns/vl1r_v.h
index 09f4040..61e8765 100644
--- a/riscv/insns/vl1r_v.h
+++ b/riscv/insns/vl1r_v.h
@@ -1,5 +1,5 @@
 // vl1r.v vd, (rs1)
-require_vector;
+require_vector_novtype(true);
 const reg_t baseAddr = RS1;
 const reg_t vd = insn.rd();
 for (reg_t i = 0; i < P.VU.vlenb; ++i) {
diff --git a/riscv/insns/vmvnfr_v.h b/riscv/insns/vmvnfr_v.h
index bafcb4d..51045ce 100644
--- a/riscv/insns/vmvnfr_v.h
+++ b/riscv/insns/vmvnfr_v.h
@@ -1,5 +1,5 @@
 // vmv1r.v vd, vs2
-require_vector;
+require_vector_novtype(true);
 const reg_t baseAddr = RS1;
 const reg_t vd = insn.rd();
 const reg_t vs2 = insn.rs2();
diff --git a/riscv/insns/vs1r_v.h b/riscv/insns/vs1r_v.h
index c176a20..072664c 100644
--- a/riscv/insns/vs1r_v.h
+++ b/riscv/insns/vs1r_v.h
@@ -1,5 +1,5 @@
 // vs1r.v vs3, (rs1)
-require_vector;
+require_vector_novtype(true);
 const reg_t baseAddr = RS1;
 const reg_t vs3 = insn.rd();
 for (reg_t i = 0; i < P.VU.vlenb; ++i) {
diff --git a/riscv/insns/vsetvl.h b/riscv/insns/vsetvl.h
index fb3a558..4d03542 100644
--- a/riscv/insns/vsetvl.h
+++ b/riscv/insns/vsetvl.h
@@ -1,2 +1,2 @@
-require_vector_for_vsetvl;
+require_vector_novtype(false);
 WRITE_RD(P.VU.set_vl(insn.rd(), insn.rs1(), RS1, RS2));
diff --git a/riscv/insns/vsetvli.h b/riscv/insns/vsetvli.h
index 56d3a9a..d1f43b5 100644
--- a/riscv/insns/vsetvli.h
+++ b/riscv/insns/vsetvli.h
@@ -1,2 +1,2 @@
-require_vector_for_vsetvl;
+require_vector_novtype(false);
 WRITE_RD(P.VU.set_vl(insn.rd(), insn.rs1(), RS1, insn.v_zimm11()));