Convert vl to csr_t

Adds commit log events for vl to many vector instructions.

9 files changed, 10 insertions, 10 deletions

diff --git a/riscv/insns/vcpop_m.h b/riscv/insns/vcpop_m.h
index fb3e620..cbe45a4 100644
--- a/riscv/insns/vcpop_m.h
+++ b/riscv/insns/vcpop_m.h
@@ -1,7 +1,7 @@
 // vmpopc rd, vs2, vm
 require(P.VU.vsew >= e8 && P.VU.vsew <= e64);
 require_vector(true);
-reg_t vl = P.VU.vl;
+reg_t vl = P.VU.vl->read();
 reg_t sew = P.VU.vsew;
 reg_t rd_num = insn.rd();
 reg_t rs2_num = insn.rs2();
diff --git a/riscv/insns/vfirst_m.h b/riscv/insns/vfirst_m.h
index 71e8379..5b768ed 100644
--- a/riscv/insns/vfirst_m.h
+++ b/riscv/insns/vfirst_m.h
@@ -1,7 +1,7 @@
 // vmfirst rd, vs2
 require(P.VU.vsew >= e8 && P.VU.vsew <= e64);
 require_vector(true);
-reg_t vl = P.VU.vl;
+reg_t vl = P.VU.vl->read();
 reg_t sew = P.VU.vsew;
 reg_t rd_num = insn.rd();
 reg_t rs2_num = insn.rs2();
diff --git a/riscv/insns/vfmv_s_f.h b/riscv/insns/vfmv_s_f.h
index 116ed45..edc376e 100644
--- a/riscv/insns/vfmv_s_f.h
+++ b/riscv/insns/vfmv_s_f.h
@@ -6,7 +6,7 @@ require((P.VU.vsew == e16 && p->extension_enabled(EXT_ZFH)) ||
         (P.VU.vsew == e64 && p->extension_enabled('D')));
 require(STATE.frm->read() < 0x5);
 
-reg_t vl = P.VU.vl;
+reg_t vl = P.VU.vl->read();
 
 if (vl > 0 && P.VU.vstart->read() < vl) {
   reg_t rd_num = insn.rd();
diff --git a/riscv/insns/vid_v.h b/riscv/insns/vid_v.h
index 0b5c89c..c316291 100644
--- a/riscv/insns/vid_v.h
+++ b/riscv/insns/vid_v.h
@@ -1,7 +1,7 @@
 // vmpopc rd, vs2, vm
 require(P.VU.vsew >= e8 && P.VU.vsew <= e64);
 require_vector(true);
-reg_t vl = P.VU.vl;
+reg_t vl = P.VU.vl->read();
 reg_t sew = P.VU.vsew;
 reg_t rd_num = insn.rd();
 reg_t rs1_num = insn.rs1();
@@ -9,7 +9,7 @@ reg_t rs2_num = insn.rs2();
 require_align(rd_num, P.VU.vflmul);
 require_vm;
 
-for (reg_t i = P.VU.vstart->read() ; i < P.VU.vl; ++i) {
+for (reg_t i = P.VU.vstart->read() ; i < P.VU.vl->read(); ++i) {
   VI_LOOP_ELEMENT_SKIP();
 
   switch (sew) {
diff --git a/riscv/insns/viota_m.h b/riscv/insns/viota_m.h
index 68926e4..f74f2c2 100644
--- a/riscv/insns/viota_m.h
+++ b/riscv/insns/viota_m.h
@@ -1,7 +1,7 @@
 // vmpopc rd, vs2, vm
 require(P.VU.vsew >= e8 && P.VU.vsew <= e64);
 require_vector(true);
-reg_t vl = P.VU.vl;
+reg_t vl = P.VU.vl->read();
 reg_t sew = P.VU.vsew;
 reg_t rd_num = insn.rd();
 reg_t rs1_num = insn.rs1();
diff --git a/riscv/insns/vmsbf_m.h b/riscv/insns/vmsbf_m.h
index 9e32531..6147f6d 100644
--- a/riscv/insns/vmsbf_m.h
+++ b/riscv/insns/vmsbf_m.h
@@ -5,7 +5,7 @@ require(P.VU.vstart->read() == 0);
 require_vm;
 require(insn.rd() != insn.rs2());
 
-reg_t vl = P.VU.vl;
+reg_t vl = P.VU.vl->read();
 reg_t rd_num = insn.rd();
 reg_t rs2_num = insn.rs2();
 
diff --git a/riscv/insns/vmsif_m.h b/riscv/insns/vmsif_m.h
index 8867646..447813f 100644
--- a/riscv/insns/vmsif_m.h
+++ b/riscv/insns/vmsif_m.h
@@ -5,7 +5,7 @@ require(P.VU.vstart->read() == 0);
 require_vm;
 require(insn.rd() != insn.rs2());
 
-reg_t vl = P.VU.vl;
+reg_t vl = P.VU.vl->read();
 reg_t rd_num = insn.rd();
 reg_t rs2_num = insn.rs2();
 
diff --git a/riscv/insns/vmsof_m.h b/riscv/insns/vmsof_m.h
index a2f247f..b9edcf3 100644
--- a/riscv/insns/vmsof_m.h
+++ b/riscv/insns/vmsof_m.h
@@ -5,7 +5,7 @@ require(P.VU.vstart->read() == 0);
 require_vm;
 require(insn.rd() != insn.rs2());
 
-reg_t vl = P.VU.vl;
+reg_t vl = P.VU.vl->read();
 reg_t rd_num = insn.rd();
 reg_t rs2_num = insn.rs2();
 
diff --git a/riscv/insns/vmv_s_x.h b/riscv/insns/vmv_s_x.h
index cc2d6f0..b66855b 100644
--- a/riscv/insns/vmv_s_x.h
+++ b/riscv/insns/vmv_s_x.h
@@ -2,7 +2,7 @@
 require_vector(true);
 require(insn.v_vm() == 1);
 require(P.VU.vsew >= e8 && P.VU.vsew <= e64);
-reg_t vl = P.VU.vl;
+reg_t vl = P.VU.vl->read();
 
 if (vl > 0 && P.VU.vstart->read() < vl) {
   reg_t rd_num = insn.rd();