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author | Anup Patel <anup.patel@wdc.com> | 2020-06-13 15:38:21 +0530 |
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committer | Anup Patel <anup@brainfault.org> | 2020-07-09 23:04:07 +0530 |
commit | 9af85e39a550ba031e4fe9c1913e275959a9927b (patch) | |
tree | 40e434e8473c0ef517461a0e2d5add4887a27110 /riscv/insns/wfi.h | |
parent | b6038de3fcd71703732995bb90bd7d411d330890 (diff) | |
download | spike-9af85e39a550ba031e4fe9c1913e275959a9927b.zip spike-9af85e39a550ba031e4fe9c1913e275959a9927b.tar.gz spike-9af85e39a550ba031e4fe9c1913e275959a9927b.tar.bz2 |
Implement hypervisor CSRs read/write
We add newly defined hypervisor CSRs and allow M/HS-mode to access
these CSRs. The MRET, SRET, ECALL and WFI instructions have also
been updated so that virt-to-novirt switch and exception cause is
based on HART virtualization state.
Subsequent patches will implement two-stage page tables, HFENCE
instructions and HSV/HLV instructions.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Diffstat (limited to 'riscv/insns/wfi.h')
-rw-r--r-- | riscv/insns/wfi.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/riscv/insns/wfi.h b/riscv/insns/wfi.h index 6504b78..5b1d1d6 100644 --- a/riscv/insns/wfi.h +++ b/riscv/insns/wfi.h @@ -1,2 +1,4 @@ require_privilege(get_field(STATE.mstatus, MSTATUS_TW) ? PRV_M : PRV_S); +if (STATE.v && get_field(STATE.hstatus, HSTATUS_VTW)) + require_novirt(); wfi(); |