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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2019-09-25 19:57:50 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2019-11-11 19:02:34 -0800 |
| commit | b9d9e1ebd02c62ad354195481d1136f5be3f54cd (patch) | |
| tree | c0d333eae33185b189cf730719f7d007c98bddaa /riscv/insns/vsuxw_v.h | |
| parent | df85f7fbe4b82eccf594a0d0fb7b8f5e6150dea1 (diff) | |
| download | spike-b9d9e1ebd02c62ad354195481d1136f5be3f54cd.zip spike-b9d9e1ebd02c62ad354195481d1136f5be3f54cd.tar.gz spike-b9d9e1ebd02c62ad354195481d1136f5be3f54cd.tar.bz2 | |
rvv: remove configuable tail-zero
tail zero feature has been removed after v0.8-draft
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/insns/vsuxw_v.h')
| -rw-r--r-- | riscv/insns/vsuxw_v.h | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/riscv/insns/vsuxw_v.h b/riscv/insns/vsuxw_v.h index ec1a8fe..f133e77 100644 --- a/riscv/insns/vsuxw_v.h +++ b/riscv/insns/vsuxw_v.h @@ -8,20 +8,17 @@ reg_t vs3 = insn.rd(); reg_t vlmax = P.VU.vlmax; VI_DUPLICATE_VREG(stride, vlmax); for (reg_t i = 0; i < vlmax && vl != 0; ++i) { - bool is_valid = true; VI_ELEMENT_SKIP(i); VI_STRIP(i) switch (P.VU.vsew) { case e32: - if (is_valid) - MMU.store_uint32(baseAddr + index[i], - P.VU.elt<uint32_t>(vs3, vreg_inx)); + MMU.store_uint32(baseAddr + index[i], + P.VU.elt<uint32_t>(vs3, vreg_inx)); break; case e64: - if (is_valid) - MMU.store_uint32(baseAddr + index[i], - P.VU.elt<uint64_t>(vs3, vreg_inx)); + MMU.store_uint32(baseAddr + index[i], + P.VU.elt<uint64_t>(vs3, vreg_inx)); break; } } |