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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2019-11-26 23:14:57 -0800 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2019-12-20 09:58:46 -0800 |
| commit | c9358be364d64aa0093ab5524cc17884b5f36137 (patch) | |
| tree | db34b267d0939949b4860df56b023787c2d15c36 /riscv/insns/vslide1up_vx.h | |
| parent | 171cfe6bd144021c3218f0bb52ba0d632c38c509 (diff) | |
| download | spike-c9358be364d64aa0093ab5524cc17884b5f36137.zip spike-c9358be364d64aa0093ab5524cc17884b5f36137.tar.gz spike-c9358be364d64aa0093ab5524cc17884b5f36137.tar.bz2 | |
rvv: change vmerge/vslideup register checking rule
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/insns/vslide1up_vx.h')
| -rw-r--r-- | riscv/insns/vslide1up_vx.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/insns/vslide1up_vx.h b/riscv/insns/vslide1up_vx.h index 69ce0fd..214512a 100644 --- a/riscv/insns/vslide1up_vx.h +++ b/riscv/insns/vslide1up_vx.h @@ -2,7 +2,7 @@ require((insn.rs2() & (P.VU.vlmul - 1)) == 0); require((insn.rd() & (P.VU.vlmul - 1)) == 0); require(insn.rd() != insn.rs2()); -if (P.VU.vlmul > 1 && insn.v_vm() == 0) +if (insn.v_vm() == 0) require(insn.rd() != 0); VI_LOOP_BASE |