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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-04-13 01:21:20 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-04-24 00:24:30 -0700 |
| commit | 7b3d88f5de4e47c989e64d49498233ecda928b09 (patch) | |
| tree | 0c5c09c4d2e927ad3dd13f14fbd5c5b49c010f3e /riscv/insns/vslide1up_vx.h | |
| parent | a261be3dc658e1a483ea6a02733d48be1b70f277 (diff) | |
| download | spike-7b3d88f5de4e47c989e64d49498233ecda928b09.zip spike-7b3d88f5de4e47c989e64d49498233ecda928b09.tar.gz spike-7b3d88f5de4e47c989e64d49498233ecda928b09.tar.bz2 | |
rvv: add vfslide1[down|up].vf and refine checking rule
1. new features in spec 0.9
2. also fix destination commitlog information for integer comparison
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/insns/vslide1up_vx.h')
| -rw-r--r-- | riscv/insns/vslide1up_vx.h | 14 |
1 files changed, 5 insertions, 9 deletions
diff --git a/riscv/insns/vslide1up_vx.h b/riscv/insns/vslide1up_vx.h index 5154259..33cb9ed 100644 --- a/riscv/insns/vslide1up_vx.h +++ b/riscv/insns/vslide1up_vx.h @@ -1,9 +1,5 @@ //vslide1up.vx vd, vs2, rs1 -require((insn.rs2() & (P.VU.vlmul - 1)) == 0); -require((insn.rd() & (P.VU.vlmul - 1)) == 0); -require(insn.rd() != insn.rs2()); -if (insn.v_vm() == 0 && P.VU.vlmul > 1) - require(insn.rd() != 0); +VI_CHECK_SLIDE(true); VI_LOOP_BASE if (i != 0) { @@ -22,13 +18,13 @@ if (i != 0) { } } else { if (sew == e8) { - P.VU.elt<uint8_t>(rd_num, 0) = RS1; + P.VU.elt<uint8_t>(rd_num, 0, true) = RS1; } else if(sew == e16) { - P.VU.elt<uint16_t>(rd_num, 0) = RS1; + P.VU.elt<uint16_t>(rd_num, 0, true) = RS1; } else if(sew == e32) { - P.VU.elt<uint32_t>(rd_num, 0) = RS1; + P.VU.elt<uint32_t>(rd_num, 0, true) = RS1; } else if(sew == e64) { - P.VU.elt<uint64_t>(rd_num, 0) = RS1; + P.VU.elt<uint64_t>(rd_num, 0, true) = RS1; } } VI_LOOP_END |