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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2019-10-23 01:36:33 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2019-11-11 19:02:35 -0800 |
| commit | e289b996c6ef60693b394b57bb53034c38eff4e4 (patch) | |
| tree | 9cd36f16b3d07c1849ac219c70e0eebac3cb99ed /riscv/insns/vslide1down_vx.h | |
| parent | c655b1cf465f59912ddb5b0dbd6f83f1d5516406 (diff) | |
| download | spike-e289b996c6ef60693b394b57bb53034c38eff4e4.zip spike-e289b996c6ef60693b394b57bb53034c38eff4e4.tar.gz spike-e289b996c6ef60693b394b57bb53034c38eff4e4.tar.bz2 | |
rvv: add reg checking rule to vslide instructions
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/insns/vslide1down_vx.h')
| -rw-r--r-- | riscv/insns/vslide1down_vx.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/riscv/insns/vslide1down_vx.h b/riscv/insns/vslide1down_vx.h index 0069df7..04e2540 100644 --- a/riscv/insns/vslide1down_vx.h +++ b/riscv/insns/vslide1down_vx.h @@ -1,4 +1,9 @@ //vslide1down.vx vd, vs2, rs1 +require((insn.rs2() & (P.VU.vlmul - 1)) == 0); +require((insn.rd() & (P.VU.vlmul - 1)) == 0); +if (P.VU.vlmul > 1 && insn.v_vm() == 0) + require(insn.rd() != 0); + VI_LOOP_BASE if (i != vl - 1) { switch (sew) { |