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author | Albert Ou <aou@eecs.berkeley.edu> | 2019-09-28 19:22:11 +0800 |
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committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2019-11-11 19:02:34 -0800 |
commit | 4cdecf219b3f8165a24ca83bc92f0241e0832513 (patch) | |
tree | ce421b76972945989a42757951a4ae14cb88f770 /riscv/insns/vnclipu_vv.h | |
parent | 590abe0960e9604f439d572c75abb440bbeaeadd (diff) | |
download | spike-4cdecf219b3f8165a24ca83bc92f0241e0832513.zip spike-4cdecf219b3f8165a24ca83bc92f0241e0832513.tar.gz spike-4cdecf219b3f8165a24ca83bc92f0241e0832513.tar.bz2 |
rvv: fix the rounding bit position for vnclip instructions.
1. The rounding increment should be derived from the shift amount, not SEW.
2. Use 128bit to store temporary result to handle shift = 63 case in rv64
Signed-off-by: Albert Ou <aou@eecs.berkeley.edu>
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/insns/vnclipu_vv.h')
-rw-r--r-- | riscv/insns/vnclipu_vv.h | 17 |
1 files changed, 6 insertions, 11 deletions
diff --git a/riscv/insns/vnclipu_vv.h b/riscv/insns/vnclipu_vv.h index 004f24f..3be3446 100644 --- a/riscv/insns/vnclipu_vv.h +++ b/riscv/insns/vnclipu_vv.h @@ -3,20 +3,15 @@ VRM xrm = P.VU.get_vround_mode(); uint64_t int_max = ~(-1ll << P.VU.vsew); VI_VVXI_LOOP_NARROW ({ + uint128_t result = vs2_u; + unsigned shift = vs1 & ((sew * 2) - 1); - uint64_t result = vs2_u; + // rounding + INT_ROUNDING(result, xrm, shift); -// rounding - INT_ROUNDING(result, xrm, sew); + result = result >> shift; -// unsigned shifting to rs1 - uint64_t unsigned_shift_amount = (uint64_t)(vs1 & ((sew * 2) - 1)); - if (unsigned_shift_amount >= (2 * sew)) { - result = 0; - } else { - result = vzext(result, sew * 2) >> unsigned_shift_amount; - } -// saturation + // saturation if (result & (uint64_t)(-1ll << sew)) { result = int_max; P.VU.vxsat = 1; |