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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2019-09-16 01:17:09 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2019-11-11 19:02:34 -0800 |
| commit | 3fc52f5989e498aeaad147b5b5591d63e27ca9a9 (patch) | |
| tree | 4bb7dda08a69f67192adc376fb7543ab867c7e8d /riscv/insns/vmv_x_s.h | |
| parent | 530b2d1d582d7cef7ab415570e72d1c0994307a9 (diff) | |
| download | spike-3fc52f5989e498aeaad147b5b5591d63e27ca9a9.zip spike-3fc52f5989e498aeaad147b5b5591d63e27ca9a9.tar.gz spike-3fc52f5989e498aeaad147b5b5591d63e27ca9a9.tar.bz2 | |
rvv: fix vmv.x.s signed-ext issue
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/insns/vmv_x_s.h')
| -rw-r--r-- | riscv/insns/vmv_x_s.h | 47 |
1 files changed, 25 insertions, 22 deletions
diff --git a/riscv/insns/vmv_x_s.h b/riscv/insns/vmv_x_s.h index f22c2dd..50f2e79 100644 --- a/riscv/insns/vmv_x_s.h +++ b/riscv/insns/vmv_x_s.h @@ -1,25 +1,28 @@ -// vext_x_v: rd = vs2[0] +// vmv_x_s: rd = vs2[rs1] require(insn.v_vm() == 1); uint64_t xmask = UINT64_MAX >> (64 - P.get_max_xlen()); -VI_LOOP_BASE -VI_LOOP_END_NO_TAIL_ZERO -switch(sew) { -case e8: - WRITE_RD(P.VU.elt<uint8_t>(rs2_num, 0)); - break; -case e16: - WRITE_RD(P.VU.elt<uint16_t>(rs2_num, 0)); - break; -case e32: - if (P.get_max_xlen() == 32) - WRITE_RD(P.VU.elt<int32_t>(rs2_num, 0)); - else - WRITE_RD(P.VU.elt<uint32_t>(rs2_num, 0)); - break; -case e64: - if (P.get_max_xlen() <= sew) - WRITE_RD(P.VU.elt<uint64_t>(rs2_num, 0) & xmask); - else - WRITE_RD(P.VU.elt<uint64_t>(rs2_num, 0)); - break; +reg_t rs1 = RS1; +reg_t sew = P.VU.vsew; +reg_t rs2_num = insn.rs2(); + +if (!(rs1 >= 0 && rs1 < (P.VU.get_vlen() / sew))) { + WRITE_RD(0); +} else { + switch(sew) { + case e8: + WRITE_RD(P.VU.elt<int8_t>(rs2_num, rs1)); + break; + case e16: + WRITE_RD(P.VU.elt<int16_t>(rs2_num, rs1)); + break; + case e32: + WRITE_RD(P.VU.elt<int32_t>(rs2_num, rs1)); + break; + case e64: + if (P.get_max_xlen() <= sew) + WRITE_RD(P.VU.elt<uint64_t>(rs2_num, rs1) & xmask); + else + WRITE_RD(P.VU.elt<uint64_t>(rs2_num, rs1)); + break; + } } |