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| author | Weiwei Li <liweiwei@iscas.ac.cn> | 2022-08-10 22:55:07 +0800 |
|---|---|---|
| committer | Weiwei Li <liweiwei@iscas.ac.cn> | 2022-08-10 23:05:58 +0800 |
| commit | ce34edb0eecec520d6d2cfec5bda57ca90a69f14 (patch) | |
| tree | f5f5da62f53bced28e38349a1b41983bb916dcfa /riscv/insns/vmsif_m.h | |
| parent | 2aaa89c0cf8fe0f45d284c0847f11d175eb82e03 (diff) | |
| download | spike-ce34edb0eecec520d6d2cfec5bda57ca90a69f14.zip spike-ce34edb0eecec520d6d2cfec5bda57ca90a69f14.tar.gz spike-ce34edb0eecec520d6d2cfec5bda57ca90a69f14.tar.bz2 | |
Add space between if/while/switch and '('
Add space between ')' and '{'
Diffstat (limited to 'riscv/insns/vmsif_m.h')
| -rw-r--r-- | riscv/insns/vmsif_m.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/insns/vmsif_m.h b/riscv/insns/vmsif_m.h index 447813f..cbcbc2a 100644 --- a/riscv/insns/vmsif_m.h +++ b/riscv/insns/vmsif_m.h @@ -23,7 +23,7 @@ for (reg_t i = P.VU.vstart->read(); i < vl; ++i) { uint64_t res = 0; if (!has_one && !vs2_lsb) { res = 1; - } else if(!has_one && vs2_lsb) { + } else if (!has_one && vs2_lsb) { has_one = true; res = 1; } |