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| author | Scott Johnson <scott.johnson@arilinc.com> | 2021-09-24 22:02:14 -0700 |
|---|---|---|
| committer | Scott Johnson <scott.johnson@arilinc.com> | 2021-09-27 18:00:28 -0700 |
| commit | 2b26a3cdf1cf391893a0a1a31815ac59d96ff05c (patch) | |
| tree | 72bb3f45134ad2dce2c3135e9fa731fcdac6e8d7 /riscv/insns/vfncvt_x_f_w.h | |
| parent | ede97384f6f760a1a2c8b15f329e3e7c574a0301 (diff) | |
| download | spike-2b26a3cdf1cf391893a0a1a31815ac59d96ff05c.zip spike-2b26a3cdf1cf391893a0a1a31815ac59d96ff05c.tar.gz spike-2b26a3cdf1cf391893a0a1a31815ac59d96ff05c.tar.bz2 | |
Convert frm & fflags to csr_t
Adds proper logging of fflags on FP arithmetic ops.
Diffstat (limited to 'riscv/insns/vfncvt_x_f_w.h')
| -rw-r--r-- | riscv/insns/vfncvt_x_f_w.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/riscv/insns/vfncvt_x_f_w.h b/riscv/insns/vfncvt_x_f_w.h index a342e3f..a8a6dfb 100644 --- a/riscv/insns/vfncvt_x_f_w.h +++ b/riscv/insns/vfncvt_x_f_w.h @@ -2,15 +2,15 @@ VI_VFP_CVT_SCALE ({ auto vs2 = P.VU.elt<float16_t>(rs2_num, i); - P.VU.elt<int8_t>(rd_num, i, true) = f16_to_i8(vs2, STATE.frm, true); + P.VU.elt<int8_t>(rd_num, i, true) = f16_to_i8(vs2, STATE.frm->read(), true); }, { auto vs2 = P.VU.elt<float32_t>(rs2_num, i); - P.VU.elt<int16_t>(rd_num, i, true) = f32_to_i16(vs2, STATE.frm, true); + P.VU.elt<int16_t>(rd_num, i, true) = f32_to_i16(vs2, STATE.frm->read(), true); }, { auto vs2 = P.VU.elt<float64_t>(rs2_num, i); - P.VU.elt<int32_t>(rd_num, i, true) = f64_to_i32(vs2, STATE.frm, true); + P.VU.elt<int32_t>(rd_num, i, true) = f64_to_i32(vs2, STATE.frm->read(), true); }, { require(p->extension_enabled(EXT_ZFH)); |