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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-05-27 00:59:29 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-05-28 22:59:58 -0700 |
| commit | 1bf9d025f7efaf153d551a1128d423444522ba3f (patch) | |
| tree | 0f45cca40f606b7b53b613791add9f7590bfb611 /riscv/insns/vfncvt_x_f_w.h | |
| parent | 36ebbb068c6508b9e42398b2307b5c5792459395 (diff) | |
| download | spike-1bf9d025f7efaf153d551a1128d423444522ba3f.zip spike-1bf9d025f7efaf153d551a1128d423444522ba3f.tar.gz spike-1bf9d025f7efaf153d551a1128d423444522ba3f.tar.bz2 | |
rvv: add e8 type for narrow/widen conversion
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/insns/vfncvt_x_f_w.h')
| -rw-r--r-- | riscv/insns/vfncvt_x_f_w.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/riscv/insns/vfncvt_x_f_w.h b/riscv/insns/vfncvt_x_f_w.h index 3ddbb87..aed35e6 100644 --- a/riscv/insns/vfncvt_x_f_w.h +++ b/riscv/insns/vfncvt_x_f_w.h @@ -1,6 +1,10 @@ // vfncvt.x.f.w vd, vs2, vm VI_VFP_CVT_SCALE ({ + auto vs2 = P.VU.elt<float16_t>(rs2_num, i); + P.VU.elt<int8_t>(rd_num, i, true) = f16_to_i8(vs2, STATE.frm, true); +}, +{ auto vs2 = P.VU.elt<float32_t>(rs2_num, i); P.VU.elt<int16_t>(rd_num, i, true) = f32_to_i16(vs2, STATE.frm, true); }, |