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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-04-06 22:30:12 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-05-04 09:50:05 -0700 |
| commit | d09689d271d09892f3ec9337f3d633e20af6f19d (patch) | |
| tree | f0e6d47b2af47c50cf53c8b7f62161e883acba19 /riscv/insns/vfncvt_rtz_x_f_w.h | |
| parent | aa05cc874776fd834eb490d5fc244f1b17d8c8a1 (diff) | |
| download | spike-d09689d271d09892f3ec9337f3d633e20af6f19d.zip spike-d09689d271d09892f3ec9337f3d633e20af6f19d.tar.gz spike-d09689d271d09892f3ec9337f3d633e20af6f19d.tar.bz2 | |
rvv: fp16: support conversion instrucitons
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/insns/vfncvt_rtz_x_f_w.h')
| -rw-r--r-- | riscv/insns/vfncvt_rtz_x_f_w.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/riscv/insns/vfncvt_rtz_x_f_w.h b/riscv/insns/vfncvt_rtz_x_f_w.h index 2fc8edf..70c66d1 100644 --- a/riscv/insns/vfncvt_rtz_x_f_w.h +++ b/riscv/insns/vfncvt_rtz_x_f_w.h @@ -1,10 +1,10 @@ -// vfncvt.x.f.v vd, vs2, vm -VI_CHECK_SDS(false); -if (P.VU.vsew == e32) - require(p->supports_extension('D')); - -VI_VFP_LOOP_BASE +// vfncvt.rtz.x.f.w vd, vs2, vm +VI_VFP_CVT_SCALE +({ + auto vs2 = P.VU.elt<float32_t>(rs2_num, i); + P.VU.elt<int16_t>(rd_num, i, true) = f32_to_i16(vs2, softfloat_round_minMag, true); +}, +{ auto vs2 = P.VU.elt<float64_t>(rs2_num, i); P.VU.elt<int32_t>(rd_num, i, true) = f64_to_i32(vs2, softfloat_round_minMag, true); - set_fp_exceptions; -VI_VFP_LOOP_END +}, false) |