rvv: add floating-point instructions

based on v-spec 0.7.1, support
  sections: 14/15.3 ~ 15.4
  element size: 32

Signed-off-by: Bruce Hoult <bruce@hoult.org>
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Signed-off-by: Dave Wen <dave.wen@sifive.com>

1 files changed, 29 insertions, 0 deletions

diff --git a/riscv/insns/vfmv_s_f.h b/riscv/insns/vfmv_s_f.h
new file mode 100644
index 0000000..13423b1
--- /dev/null
+++ b/riscv/insns/vfmv_s_f.h
@@ -0,0 +1,29 @@
+// vfmv_s_f: vd[0] = rs1 (vs2=0)
+require(insn.v_vm() == 1);
+require_fp;
+require(P.VU.vsew == e32);
+reg_t vl = P.VU.vl;
+
+if (vl > 0) {
+  reg_t rd_num = insn.rd();
+  reg_t sew = P.VU.vsew;
+
+  if (FLEN == 64)
+    P.VU.elt<uint32_t>(rd_num, 0) = f64(FRS1).v;
+  else
+    P.VU.elt<uint32_t>(rd_num, 0) = f32(FRS1).v;
+
+  const reg_t max_len = P.VU.VLEN / sew;
+  for (reg_t i = 1; i < max_len; ++i) {
+    switch(sew) {
+    case e32:
+      P.VU.elt<uint32_t>(rd_num, i) = 0;
+      break;
+    default:
+      require(false);
+      break;
+    }
+  }
+
+  vl = 0;
+}