diff options
| author | Weiwei Li <liweiwei@iscas.ac.cn> | 2022-08-10 22:55:07 +0800 |
|---|---|---|
| committer | Weiwei Li <liweiwei@iscas.ac.cn> | 2022-08-10 23:05:58 +0800 |
| commit | ce34edb0eecec520d6d2cfec5bda57ca90a69f14 (patch) | |
| tree | f5f5da62f53bced28e38349a1b41983bb916dcfa /riscv/insns/vfmv_f_s.h | |
| parent | 2aaa89c0cf8fe0f45d284c0847f11d175eb82e03 (diff) | |
| download | spike-ce34edb0eecec520d6d2cfec5bda57ca90a69f14.zip spike-ce34edb0eecec520d6d2cfec5bda57ca90a69f14.tar.gz spike-ce34edb0eecec520d6d2cfec5bda57ca90a69f14.tar.bz2 | |
Add space between if/while/switch and '('
Add space between ')' and '{'
Diffstat (limited to 'riscv/insns/vfmv_f_s.h')
| -rw-r--r-- | riscv/insns/vfmv_f_s.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/insns/vfmv_f_s.h b/riscv/insns/vfmv_f_s.h index 81605ea..0f3cf8c 100644 --- a/riscv/insns/vfmv_f_s.h +++ b/riscv/insns/vfmv_f_s.h @@ -9,7 +9,7 @@ require(STATE.frm->read() < 0x5); reg_t rs2_num = insn.rs2(); uint64_t vs2_0 = 0; const reg_t sew = P.VU.vsew; -switch(sew) { +switch (sew) { case e16: vs2_0 = P.VU.elt<uint16_t>(rs2_num, 0); break; |