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author | Scott Johnson <scott.johnson@arilinc.com> | 2021-09-24 22:02:14 -0700 |
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committer | Scott Johnson <scott.johnson@arilinc.com> | 2021-09-27 18:00:28 -0700 |
commit | 2b26a3cdf1cf391893a0a1a31815ac59d96ff05c (patch) | |
tree | 72bb3f45134ad2dce2c3135e9fa731fcdac6e8d7 /riscv/insns/vfcvt_xu_f_v.h | |
parent | ede97384f6f760a1a2c8b15f329e3e7c574a0301 (diff) | |
download | spike-2b26a3cdf1cf391893a0a1a31815ac59d96ff05c.zip spike-2b26a3cdf1cf391893a0a1a31815ac59d96ff05c.tar.gz spike-2b26a3cdf1cf391893a0a1a31815ac59d96ff05c.tar.bz2 |
Convert frm & fflags to csr_t
Adds proper logging of fflags on FP arithmetic ops.
Diffstat (limited to 'riscv/insns/vfcvt_xu_f_v.h')
-rw-r--r-- | riscv/insns/vfcvt_xu_f_v.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/riscv/insns/vfcvt_xu_f_v.h b/riscv/insns/vfcvt_xu_f_v.h index 725cbda..51c00ca 100644 --- a/riscv/insns/vfcvt_xu_f_v.h +++ b/riscv/insns/vfcvt_xu_f_v.h @@ -1,11 +1,11 @@ // vfcvt.xu.f.v vd, vd2, vm VI_VFP_VV_LOOP ({ - P.VU.elt<uint16_t>(rd_num, i) = f16_to_ui16(vs2, STATE.frm, true); + P.VU.elt<uint16_t>(rd_num, i) = f16_to_ui16(vs2, STATE.frm->read(), true); }, { - P.VU.elt<uint32_t>(rd_num, i) = f32_to_ui32(vs2, STATE.frm, true); + P.VU.elt<uint32_t>(rd_num, i) = f32_to_ui32(vs2, STATE.frm->read(), true); }, { - P.VU.elt<uint64_t>(rd_num, i) = f64_to_ui64(vs2, STATE.frm, true); + P.VU.elt<uint64_t>(rd_num, i) = f64_to_ui64(vs2, STATE.frm->read(), true); }) |