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| author | Andrew Waterman <andrew@sifive.com> | 2021-06-02 00:40:10 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2021-06-02 00:40:10 -0700 |
| commit | cb7805a9689e2d5de23b959b177940d1b8813bd2 (patch) | |
| tree | b539e96afdd276167ccafc61760faee26767b3f2 /riscv/insns/rolw.h | |
| parent | 16308bc1a01b8f540cf3e95e9f30b96d92df01e0 (diff) | |
| download | spike-cb7805a9689e2d5de23b959b177940d1b8813bd2.zip spike-cb7805a9689e2d5de23b959b177940d1b8813bd2.tar.gz spike-cb7805a9689e2d5de23b959b177940d1b8813bd2.tar.bz2 | |
Accept Zba, Zbb, Zbc, Zbs ISA strings
The B extension still implies the presence of Zba/Zbb/Zbc/Zbs.
Diffstat (limited to 'riscv/insns/rolw.h')
| -rw-r--r-- | riscv/insns/rolw.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/insns/rolw.h b/riscv/insns/rolw.h index 6d66a50..f5d365b 100644 --- a/riscv/insns/rolw.h +++ b/riscv/insns/rolw.h @@ -1,5 +1,5 @@ require_rv64; -require_extension('B'); +require_extension(EXT_ZBB); int shamt = RS2 & 31; int rshamt = -shamt & 31; WRITE_RD(sext32((RS1 << shamt) | (zext32(RS1) >> rshamt))); |