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| author | Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU> | 2011-01-18 17:51:52 -0800 |
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| committer | Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU> | 2011-01-18 17:51:52 -0800 |
| commit | 21ce327f5d60d6805b5d9328b68f7ad2c261a859 (patch) | |
| tree | 22ee7ac3dfb4d00662ff6f0d1f057481efc67772 /riscv/insns/remuw.h | |
| parent | 5ddec097b858aafe783eb3aff551d00e9c8c8a37 (diff) | |
| download | spike-21ce327f5d60d6805b5d9328b68f7ad2c261a859.zip spike-21ce327f5d60d6805b5d9328b68f7ad2c261a859.tar.gz spike-21ce327f5d60d6805b5d9328b68f7ad2c261a859.tar.bz2 | |
[opcodes, sim, xcc] made *w insns illegal in RV32
now generic variants behave differently in RV32 and RV64.
Diffstat (limited to 'riscv/insns/remuw.h')
| -rw-r--r-- | riscv/insns/remuw.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/riscv/insns/remuw.h b/riscv/insns/remuw.h index 820a396..ae28fa5 100644 --- a/riscv/insns/remuw.h +++ b/riscv/insns/remuw.h @@ -1,4 +1,5 @@ -if(uint32_t(RS2) == 0) - RD = 0; +require_xpr64; +if(RS2 == 0) + RD = RS1; else - RD = sext32(uint32_t(RS1) % uint32_t(RS2)); + RD = sext32(RS1 % RS2); |