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author | Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU> | 2010-07-28 19:08:04 -0700 |
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committer | Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU> | 2010-07-28 19:08:04 -0700 |
commit | e8125348b3d13a2e96ae389efc2a16a1e8e34ea3 (patch) | |
tree | 4791da3758d733d64ff7bee97a340e8210a525a6 /riscv/insns/remu.h | |
parent | 133806b398a42da859a187eebf5792eeaed9e9d1 (diff) | |
download | spike-e8125348b3d13a2e96ae389efc2a16a1e8e34ea3.zip spike-e8125348b3d13a2e96ae389efc2a16a1e8e34ea3.tar.gz spike-e8125348b3d13a2e96ae389efc2a16a1e8e34ea3.tar.bz2 |
[sim,xcc] Changed instruction format to RISC-V
Massive changes to gcc, binutils to support new instruction encoding.
Simulator reflects these changes.
Diffstat (limited to 'riscv/insns/remu.h')
-rw-r--r-- | riscv/insns/remu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/riscv/insns/remu.h b/riscv/insns/remu.h new file mode 100644 index 0000000..d028488 --- /dev/null +++ b/riscv/insns/remu.h @@ -0,0 +1,2 @@ +RC = sext32(uint32_t(RA) % uint32_t(RB)); + |