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| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2013-09-27 00:15:35 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2013-09-27 00:15:35 -0700 |
| commit | c8a8c07ec296ce36dc04f2448faf48fe1c502a2d (patch) | |
| tree | a497ddda532182cc10aa2f82a555e0d3ab4d220c /riscv/insns/lbu.h | |
| parent | 6554cdd3fb42bc3833a1888f87dfc67c9099500c (diff) | |
| download | spike-c8a8c07ec296ce36dc04f2448faf48fe1c502a2d.zip spike-c8a8c07ec296ce36dc04f2448faf48fe1c502a2d.tar.gz spike-c8a8c07ec296ce36dc04f2448faf48fe1c502a2d.tar.bz2 | |
Use WRITE_RD/WRITE_FRD macros to write registers
Diffstat (limited to 'riscv/insns/lbu.h')
| -rw-r--r-- | riscv/insns/lbu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/insns/lbu.h b/riscv/insns/lbu.h index f1e9472..64d4a68 100644 --- a/riscv/insns/lbu.h +++ b/riscv/insns/lbu.h @@ -1 +1 @@ -RD = MMU.load_uint8(RS1 + insn.i_imm()); +WRITE_RD(MMU.load_uint8(RS1 + insn.i_imm())); |