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| author | Scott Johnson <scott.johnson@arilinc.com> | 2021-10-06 12:45:03 -0700 |
|---|---|---|
| committer | Scott Johnson <scott.johnson@arilinc.com> | 2021-10-06 12:45:03 -0700 |
| commit | ee73b811d5f3b5fc899c5073646d45bd262b9c22 (patch) | |
| tree | 6a95cfe2b5e88c354c20f276580a5f55054e1526 /riscv/insns/kmmwt2_u.h | |
| parent | 894a2d772342e667e8733d83e20ff9174be7114b (diff) | |
| download | spike-ee73b811d5f3b5fc899c5073646d45bd262b9c22.zip spike-ee73b811d5f3b5fc899c5073646d45bd262b9c22.tar.gz spike-ee73b811d5f3b5fc899c5073646d45bd262b9c22.tar.bz2 | |
When mstatus.VS exists, P-extension instructions must respect it
Any instruction that may write vxsat will take an illegal instruction
exception if mstatus.VS exists and is Off.
In Spike today, mstatus.VS exists iff misa.V=1, which is true iff the
--isa string enables the V extension.
I went through the riscv-p-spec looking for "OV = 1" and added this
behavior to every matching instruction.
See #823 for discussion.
Diffstat (limited to 'riscv/insns/kmmwt2_u.h')
| -rw-r--r-- | riscv/insns/kmmwt2_u.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/riscv/insns/kmmwt2_u.h b/riscv/insns/kmmwt2_u.h index 330a241..1f525a8 100644 --- a/riscv/insns/kmmwt2_u.h +++ b/riscv/insns/kmmwt2_u.h @@ -1,3 +1,4 @@ +require_vector_vs; P_LOOP(32, { if((INT32_MIN != ps1) | (INT16_MIN != P_SH(ps2, 1))) { int64_t mres = ((int64_t) ps1 * P_SH(ps2, 1)) << 1; |