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| author | Andrew Waterman <waterman@eecs.berkeley.edu> | 2012-02-15 19:44:24 -0800 |
|---|---|---|
| committer | Andrew Waterman <waterman@eecs.berkeley.edu> | 2012-02-15 19:44:24 -0800 |
| commit | e819f852c5eafb457401396d9c3de85cd5870549 (patch) | |
| tree | 309c14e1158e039f909b4c25b068ac4f99974634 /riscv/insns/divw.h | |
| parent | c12d9358ec36062a9713fd9edfd486e1e345afdf (diff) | |
| download | spike-e819f852c5eafb457401396d9c3de85cd5870549.zip spike-e819f852c5eafb457401396d9c3de85cd5870549.tar.gz spike-e819f852c5eafb457401396d9c3de85cd5870549.tar.bz2 | |
reimplement div[u][w]/rem[u][w]
fixes bugs for inputs not properly sign-extended
Diffstat (limited to 'riscv/insns/divw.h')
| -rw-r--r-- | riscv/insns/divw.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/riscv/insns/divw.h b/riscv/insns/divw.h index 84f42a9..b51d9b7 100644 --- a/riscv/insns/divw.h +++ b/riscv/insns/divw.h @@ -1,7 +1,7 @@ require_xpr64; -if(int32_t(RS2) == 0) +sreg_t lhs = sext32(RS1); +sreg_t rhs = sext32(RS2); +if(rhs == 0) RD = UINT64_MAX; -else if(int32_t(RS1) == INT32_MIN && int32_t(RS2) == -1) - RD = RS1; else - RD = sext32(int32_t(RS1) / int32_t(RS2)); + RD = sext32(lhs / rhs); |