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| author | Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU> | 2010-11-11 15:49:21 -0800 |
|---|---|---|
| committer | Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU> | 2010-11-21 16:54:35 -0800 |
| commit | 3ebbeba6d5daa236ff346f313e79a9359d1a37bd (patch) | |
| tree | 37fc8bae27357ac4e312d5e45ea32f0288faa604 /riscv/insns/divw.h | |
| parent | 259d20a35dde46c51878dfd3afb7b8c518ed3dcf (diff) | |
| download | spike-3ebbeba6d5daa236ff346f313e79a9359d1a37bd.zip spike-3ebbeba6d5daa236ff346f313e79a9359d1a37bd.tar.gz spike-3ebbeba6d5daa236ff346f313e79a9359d1a37bd.tar.bz2 | |
[sim] handle integer division overflow
Behavior is now same as GCC's optimizer. Previously, we just crashed :)
Diffstat (limited to 'riscv/insns/divw.h')
| -rw-r--r-- | riscv/insns/divw.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/riscv/insns/divw.h b/riscv/insns/divw.h index 0654b49..0537469 100644 --- a/riscv/insns/divw.h +++ b/riscv/insns/divw.h @@ -1,2 +1,4 @@ -RD = sext32(int32_t(RS1)/int32_t(RS2)); - +if(int32_t(RS2) == 0 || int32_t(RS1) == INT32_MIN && int32_t(RS2) == -1) + RD = sext32(int32_t(RS1) < 0 ? INT32_MIN : INT32_MAX); +else + RD = sext32(int32_t(RS1)/int32_t(RS2)); |