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| author | Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU> | 2011-01-18 17:51:52 -0800 |
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| committer | Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU> | 2011-01-18 17:51:52 -0800 |
| commit | 21ce327f5d60d6805b5d9328b68f7ad2c261a859 (patch) | |
| tree | 22ee7ac3dfb4d00662ff6f0d1f057481efc67772 /riscv/insns/divw.h | |
| parent | 5ddec097b858aafe783eb3aff551d00e9c8c8a37 (diff) | |
| download | spike-21ce327f5d60d6805b5d9328b68f7ad2c261a859.zip spike-21ce327f5d60d6805b5d9328b68f7ad2c261a859.tar.gz spike-21ce327f5d60d6805b5d9328b68f7ad2c261a859.tar.bz2 | |
[opcodes, sim, xcc] made *w insns illegal in RV32
now generic variants behave differently in RV32 and RV64.
Diffstat (limited to 'riscv/insns/divw.h')
| -rw-r--r-- | riscv/insns/divw.h | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/riscv/insns/divw.h b/riscv/insns/divw.h index bfc982a..9c732b5 100644 --- a/riscv/insns/divw.h +++ b/riscv/insns/divw.h @@ -1,4 +1,7 @@ -if(int32_t(RS2) == 0 || (int32_t(RS1) == INT32_MIN && int32_t(RS2) == -1)) - RD = sext32(int32_t(RS1) < 0 ? INT32_MIN : INT32_MAX); +require_xpr64; +// INT64_MIN/-1 corner case shouldn't occur in correct code, since +// INT64_MIN is not a proper 32-bit signed value +if(RS2 == 0 || (sreg_t(RS1) == INT64_MIN && sreg_t(RS2) == -1)) + RD = sext32(sreg_t(RS1) < 0 ? INT32_MIN : INT32_MAX); else - RD = sext32(int32_t(RS1)/int32_t(RS2)); + RD = sext32(sreg_t(RS1) / sreg_t(RS2)); |