[pk,sim,xcc] Renamed instructions to RISC-V spec

All word-sized arithmetic operations are now postfixed with 'w',
and all double-word-sized arithmetic operations are no longer
prefixed with 'd'.  mtc0/mfc0 are removed and replaced with
mfpcr/mtpcr/mwfpcr/mwtpcr.

1 files changed, 1 insertions, 0 deletions

diff --git a/riscv/insns/addiw.h b/riscv/insns/addiw.h
new file mode 100644
index 0000000..6935cca
--- /dev/null
+++ b/riscv/insns/addiw.h
@@ -0,0 +1 @@
+RA = sext32(SIMM + RB);