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authorAndrew Waterman <waterman@cs.berkeley.edu>2015-09-08 15:05:31 -0700
committerAndrew Waterman <waterman@cs.berkeley.edu>2015-09-08 15:05:31 -0700
commit26d7f0f08e861335dc7bb2b51759c2206915a25a (patch)
treecf4b42673ab458ce9bef8259235918de2ef164e8 /riscv/insn_template.cc
parent1063a09757908d6b2e5712231e3690f380e4a080 (diff)
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Add facility to instrument specific opcodes
It's not ideal, because it requires modifying tracer.h. A more general facility would allow overriding the instruction execution function for a given opcode dynamically.
Diffstat (limited to 'riscv/insn_template.cc')
-rw-r--r--riscv/insn_template.cc2
1 files changed, 2 insertions, 0 deletions
diff --git a/riscv/insn_template.cc b/riscv/insn_template.cc
index 35f67a0..1e79326 100644
--- a/riscv/insn_template.cc
+++ b/riscv/insn_template.cc
@@ -7,6 +7,7 @@ reg_t rv32_NAME(processor_t* p, insn_t insn, reg_t pc)
int xlen = 32;
reg_t npc = sext_xlen(pc + insn_length(OPCODE));
#include "insns/NAME.h"
+ trace_opcode(p, OPCODE, insn);
return npc;
}
@@ -15,5 +16,6 @@ reg_t rv64_NAME(processor_t* p, insn_t insn, reg_t pc)
int xlen = 64;
reg_t npc = sext_xlen(pc + insn_length(OPCODE));
#include "insns/NAME.h"
+ trace_opcode(p, OPCODE, insn);
return npc;
}