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authorChih-Min Chao <chihmin.chao@sifive.com>2019-11-20 01:42:45 -0800
committerChih-Min Chao <chihmin.chao@sifive.com>2019-12-20 09:58:46 -0800
commit47c0eb64c81f3eb49ecfe903ee45a827cc169315 (patch)
tree213884f256e8b709856879dafc1c1f2566b5ebfa /riscv/encoding.h
parent8d50b2ff666fdf3e448f666d1741d21a90730bab (diff)
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rvv: replace vn suffic by 'w'
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/encoding.h')
-rw-r--r--riscv/encoding.h72
1 files changed, 36 insertions, 36 deletions
diff --git a/riscv/encoding.h b/riscv/encoding.h
index 9ccb68c..ec4ad8e 100644
--- a/riscv/encoding.h
+++ b/riscv/encoding.h
@@ -1120,14 +1120,14 @@
#define MASK_VSSRL_VX 0xfc00707f
#define MATCH_VSSRA_VX 0xac004057
#define MASK_VSSRA_VX 0xfc00707f
-#define MATCH_VNSRL_VX 0xb0004057
-#define MASK_VNSRL_VX 0xfc00707f
-#define MATCH_VNSRA_VX 0xb4004057
-#define MASK_VNSRA_VX 0xfc00707f
-#define MATCH_VNCLIPU_VX 0xb8004057
-#define MASK_VNCLIPU_VX 0xfc00707f
-#define MATCH_VNCLIP_VX 0xbc004057
-#define MASK_VNCLIP_VX 0xfc00707f
+#define MATCH_VNSRL_WX 0xb0004057
+#define MASK_VNSRL_WX 0xfc00707f
+#define MATCH_VNSRA_WX 0xb4004057
+#define MASK_VNSRA_WX 0xfc00707f
+#define MATCH_VNCLIPU_WX 0xb8004057
+#define MASK_VNCLIPU_WX 0xfc00707f
+#define MATCH_VNCLIP_WX 0xbc004057
+#define MASK_VNCLIP_WX 0xfc00707f
#define MATCH_VQMACCU_VX 0xf0004057
#define MASK_VQMACCU_VX 0xfc00707f
#define MATCH_VQMACC_VX 0xf4004057
@@ -1200,14 +1200,14 @@
#define MASK_VSSRL_VV 0xfc00707f
#define MATCH_VSSRA_VV 0xac000057
#define MASK_VSSRA_VV 0xfc00707f
-#define MATCH_VNSRL_VV 0xb0000057
-#define MASK_VNSRL_VV 0xfc00707f
-#define MATCH_VNSRA_VV 0xb4000057
-#define MASK_VNSRA_VV 0xfc00707f
-#define MATCH_VNCLIPU_VV 0xb8000057
-#define MASK_VNCLIPU_VV 0xfc00707f
-#define MATCH_VNCLIP_VV 0xbc000057
-#define MASK_VNCLIP_VV 0xfc00707f
+#define MATCH_VNSRL_WV 0xb0000057
+#define MASK_VNSRL_WV 0xfc00707f
+#define MATCH_VNSRA_WV 0xb4000057
+#define MASK_VNSRA_WV 0xfc00707f
+#define MATCH_VNCLIPU_WV 0xb8000057
+#define MASK_VNCLIPU_WV 0xfc00707f
+#define MATCH_VNCLIP_WV 0xbc000057
+#define MASK_VNCLIP_WV 0xfc00707f
#define MATCH_VWREDSUMU_VS 0xc0000057
#define MASK_VWREDSUMU_VS 0xfc00707f
#define MATCH_VWREDSUM_VS 0xc4000057
@@ -1272,14 +1272,14 @@
#define MASK_VSSRL_VI 0xfc00707f
#define MATCH_VSSRA_VI 0xac003057
#define MASK_VSSRA_VI 0xfc00707f
-#define MATCH_VNSRL_VI 0xb0003057
-#define MASK_VNSRL_VI 0xfc00707f
-#define MATCH_VNSRA_VI 0xb4003057
-#define MASK_VNSRA_VI 0xfc00707f
-#define MATCH_VNCLIPU_VI 0xb8003057
-#define MASK_VNCLIPU_VI 0xfc00707f
-#define MATCH_VNCLIP_VI 0xbc003057
-#define MASK_VNCLIP_VI 0xfc00707f
+#define MATCH_VNSRL_WI 0xb0003057
+#define MASK_VNSRL_WI 0xfc00707f
+#define MATCH_VNSRA_WI 0xb4003057
+#define MASK_VNSRA_WI 0xfc00707f
+#define MATCH_VNCLIPU_WI 0xb8003057
+#define MASK_VNCLIPU_WI 0xfc00707f
+#define MATCH_VNCLIP_WI 0xbc003057
+#define MASK_VNCLIP_WI 0xfc00707f
#define MATCH_VREDSUM_VS 0x2057
#define MASK_VREDSUM_VS 0xfc00707f
#define MATCH_VREDAND_VS 0x4002057
@@ -2231,10 +2231,10 @@ DECLARE_INSN(vsrl_vx, MATCH_VSRL_VX, MASK_VSRL_VX)
DECLARE_INSN(vsra_vx, MATCH_VSRA_VX, MASK_VSRA_VX)
DECLARE_INSN(vssrl_vx, MATCH_VSSRL_VX, MASK_VSSRL_VX)
DECLARE_INSN(vssra_vx, MATCH_VSSRA_VX, MASK_VSSRA_VX)
-DECLARE_INSN(vnsrl_vx, MATCH_VNSRL_VX, MASK_VNSRL_VX)
-DECLARE_INSN(vnsra_vx, MATCH_VNSRA_VX, MASK_VNSRA_VX)
-DECLARE_INSN(vnclipu_vx, MATCH_VNCLIPU_VX, MASK_VNCLIPU_VX)
-DECLARE_INSN(vnclip_vx, MATCH_VNCLIP_VX, MASK_VNCLIP_VX)
+DECLARE_INSN(vnsrl_wx, MATCH_VNSRL_WX, MASK_VNSRL_WX)
+DECLARE_INSN(vnsra_wx, MATCH_VNSRA_WX, MASK_VNSRA_WX)
+DECLARE_INSN(vnclipu_wx, MATCH_VNCLIPU_WX, MASK_VNCLIPU_WX)
+DECLARE_INSN(vnclip_wx, MATCH_VNCLIP_WX, MASK_VNCLIP_WX)
DECLARE_INSN(vqmaccu_vx, MATCH_VQMACCU_VX, MASK_VQMACCU_VX)
DECLARE_INSN(vqmacc_vx, MATCH_VQMACC_VX, MASK_VQMACC_VX)
DECLARE_INSN(vqmaccus_vx, MATCH_VQMACCUS_VX, MASK_VQMACCUS_VX)
@@ -2271,10 +2271,10 @@ DECLARE_INSN(vsrl_vv, MATCH_VSRL_VV, MASK_VSRL_VV)
DECLARE_INSN(vsra_vv, MATCH_VSRA_VV, MASK_VSRA_VV)
DECLARE_INSN(vssrl_vv, MATCH_VSSRL_VV, MASK_VSSRL_VV)
DECLARE_INSN(vssra_vv, MATCH_VSSRA_VV, MASK_VSSRA_VV)
-DECLARE_INSN(vnsrl_vv, MATCH_VNSRL_VV, MASK_VNSRL_VV)
-DECLARE_INSN(vnsra_vv, MATCH_VNSRA_VV, MASK_VNSRA_VV)
-DECLARE_INSN(vnclipu_vv, MATCH_VNCLIPU_VV, MASK_VNCLIPU_VV)
-DECLARE_INSN(vnclip_vv, MATCH_VNCLIP_VV, MASK_VNCLIP_VV)
+DECLARE_INSN(vnsrl_wv, MATCH_VNSRL_WV, MASK_VNSRL_WV)
+DECLARE_INSN(vnsra_wv, MATCH_VNSRA_WV, MASK_VNSRA_WV)
+DECLARE_INSN(vnclipu_wv, MATCH_VNCLIPU_WV, MASK_VNCLIPU_WV)
+DECLARE_INSN(vnclip_wv, MATCH_VNCLIP_WV, MASK_VNCLIP_WV)
DECLARE_INSN(vwredsumu_vs, MATCH_VWREDSUMU_VS, MASK_VWREDSUMU_VS)
DECLARE_INSN(vwredsum_vs, MATCH_VWREDSUM_VS, MASK_VWREDSUM_VS)
DECLARE_INSN(vdotu_vv, MATCH_VDOTU_VV, MASK_VDOTU_VV)
@@ -2307,10 +2307,10 @@ DECLARE_INSN(vsrl_vi, MATCH_VSRL_VI, MASK_VSRL_VI)
DECLARE_INSN(vsra_vi, MATCH_VSRA_VI, MASK_VSRA_VI)
DECLARE_INSN(vssrl_vi, MATCH_VSSRL_VI, MASK_VSSRL_VI)
DECLARE_INSN(vssra_vi, MATCH_VSSRA_VI, MASK_VSSRA_VI)
-DECLARE_INSN(vnsrl_vi, MATCH_VNSRL_VI, MASK_VNSRL_VI)
-DECLARE_INSN(vnsra_vi, MATCH_VNSRA_VI, MASK_VNSRA_VI)
-DECLARE_INSN(vnclipu_vi, MATCH_VNCLIPU_VI, MASK_VNCLIPU_VI)
-DECLARE_INSN(vnclip_vi, MATCH_VNCLIP_VI, MASK_VNCLIP_VI)
+DECLARE_INSN(vnsrl_wi, MATCH_VNSRL_WI, MASK_VNSRL_WI)
+DECLARE_INSN(vnsra_wi, MATCH_VNSRA_WI, MASK_VNSRA_WI)
+DECLARE_INSN(vnclipu_wi, MATCH_VNCLIPU_WI, MASK_VNCLIPU_WI)
+DECLARE_INSN(vnclip_wi, MATCH_VNCLIP_WI, MASK_VNCLIP_WI)
DECLARE_INSN(vredsum_vs, MATCH_VREDSUM_VS, MASK_VREDSUM_VS)
DECLARE_INSN(vredand_vs, MATCH_VREDAND_VS, MASK_VREDAND_VS)
DECLARE_INSN(vredor_vs, MATCH_VREDOR_VS, MASK_VREDOR_VS)